1*868b2d60SZhigang Qin /* 2*868b2d60SZhigang Qin * Copyright (c) 2025, Mediatek Inc. All rights reserved 3*868b2d60SZhigang Qin * SPDX-License-Identifier: BSD-3-Clause 4*868b2d60SZhigang Qin */ 5*868b2d60SZhigang Qin 6*868b2d60SZhigang Qin #ifndef MT6359P_LOWPOWER_REG_H 7*868b2d60SZhigang Qin #define MT6359P_LOWPOWER_REG_H 8*868b2d60SZhigang Qin 9*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_VOSEL_SLEEP_ADDR 0x148e 10*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW0_OP_EN_ADDR 0x1494 11*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW1_OP_EN_ADDR 0x1494 12*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW2_OP_EN_ADDR 0x1494 13*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW3_OP_EN_ADDR 0x1494 14*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW4_OP_EN_ADDR 0x1494 15*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW5_OP_EN_ADDR 0x1494 16*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW6_OP_EN_ADDR 0x1494 17*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW7_OP_EN_ADDR 0x1494 18*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW8_OP_EN_ADDR 0x1494 19*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW9_OP_EN_ADDR 0x1494 20*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW10_OP_EN_ADDR 0x1494 21*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW11_OP_EN_ADDR 0x1494 22*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW12_OP_EN_ADDR 0x1494 23*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW13_OP_EN_ADDR 0x1494 24*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW14_OP_EN_ADDR 0x1494 25*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_SW_OP_EN_ADDR 0x1494 26*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW0_OP_CFG_ADDR 0x149a 27*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW1_OP_CFG_ADDR 0x149a 28*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW2_OP_CFG_ADDR 0x149a 29*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW3_OP_CFG_ADDR 0x149a 30*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW4_OP_CFG_ADDR 0x149a 31*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW5_OP_CFG_ADDR 0x149a 32*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW6_OP_CFG_ADDR 0x149a 33*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW7_OP_CFG_ADDR 0x149a 34*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW8_OP_CFG_ADDR 0x149a 35*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW9_OP_CFG_ADDR 0x149a 36*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW10_OP_CFG_ADDR 0x149a 37*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW11_OP_CFG_ADDR 0x149a 38*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW12_OP_CFG_ADDR 0x149a 39*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW13_OP_CFG_ADDR 0x149a 40*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW14_OP_CFG_ADDR 0x149a 41*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW0_OP_MODE_ADDR 0x14a0 42*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW0_OP_MODE_SHIFT 0 43*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW1_OP_MODE_ADDR 0x14a0 44*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW1_OP_MODE_SHIFT 1 45*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW2_OP_MODE_ADDR 0x14a0 46*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW2_OP_MODE_SHIFT 2 47*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW3_OP_MODE_ADDR 0x14a0 48*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW3_OP_MODE_SHIFT 3 49*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW4_OP_MODE_ADDR 0x14a0 50*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW4_OP_MODE_SHIFT 4 51*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW5_OP_MODE_ADDR 0x14a0 52*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW5_OP_MODE_SHIFT 5 53*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW6_OP_MODE_ADDR 0x14a0 54*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW6_OP_MODE_SHIFT 6 55*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW7_OP_MODE_ADDR 0x14a0 56*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW7_OP_MODE_SHIFT 7 57*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW8_OP_MODE_ADDR 0x14a0 58*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW8_OP_MODE_SHIFT 8 59*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW9_OP_MODE_ADDR 0x14a0 60*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW9_OP_MODE_SHIFT 9 61*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW10_OP_MODE_ADDR 0x14a0 62*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW10_OP_MODE_SHIFT 10 63*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW11_OP_MODE_ADDR 0x14a0 64*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW11_OP_MODE_SHIFT 11 65*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW12_OP_MODE_ADDR 0x14a0 66*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW12_OP_MODE_SHIFT 12 67*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW13_OP_MODE_ADDR 0x14a0 68*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW13_OP_MODE_SHIFT 13 69*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW14_OP_MODE_ADDR 0x14a0 70*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPU_HW14_OP_MODE_SHIFT 14 71*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_VOSEL_SLEEP_ADDR 0x150e 72*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW0_OP_EN_ADDR 0x1514 73*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW1_OP_EN_ADDR 0x1514 74*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW2_OP_EN_ADDR 0x1514 75*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW3_OP_EN_ADDR 0x1514 76*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW4_OP_EN_ADDR 0x1514 77*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW5_OP_EN_ADDR 0x1514 78*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW6_OP_EN_ADDR 0x1514 79*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW7_OP_EN_ADDR 0x1514 80*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW8_OP_EN_ADDR 0x1514 81*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW9_OP_EN_ADDR 0x1514 82*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW10_OP_EN_ADDR 0x1514 83*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW11_OP_EN_ADDR 0x1514 84*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW12_OP_EN_ADDR 0x1514 85*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW13_OP_EN_ADDR 0x1514 86*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW14_OP_EN_ADDR 0x1514 87*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_SW_OP_EN_ADDR 0x1514 88*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW0_OP_CFG_ADDR 0x151a 89*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW1_OP_CFG_ADDR 0x151a 90*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW2_OP_CFG_ADDR 0x151a 91*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW3_OP_CFG_ADDR 0x151a 92*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW4_OP_CFG_ADDR 0x151a 93*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW5_OP_CFG_ADDR 0x151a 94*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW6_OP_CFG_ADDR 0x151a 95*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW7_OP_CFG_ADDR 0x151a 96*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW8_OP_CFG_ADDR 0x151a 97*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW9_OP_CFG_ADDR 0x151a 98*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW10_OP_CFG_ADDR 0x151a 99*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW11_OP_CFG_ADDR 0x151a 100*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW12_OP_CFG_ADDR 0x151a 101*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW13_OP_CFG_ADDR 0x151a 102*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW14_OP_CFG_ADDR 0x151a 103*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW0_OP_MODE_ADDR 0x1520 104*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW0_OP_MODE_SHIFT 0 105*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW1_OP_MODE_ADDR 0x1520 106*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW1_OP_MODE_SHIFT 1 107*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW2_OP_MODE_ADDR 0x1520 108*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW2_OP_MODE_SHIFT 2 109*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW3_OP_MODE_ADDR 0x1520 110*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW3_OP_MODE_SHIFT 3 111*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW4_OP_MODE_ADDR 0x1520 112*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW4_OP_MODE_SHIFT 4 113*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW5_OP_MODE_ADDR 0x1520 114*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW5_OP_MODE_SHIFT 5 115*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW6_OP_MODE_ADDR 0x1520 116*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW6_OP_MODE_SHIFT 6 117*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW7_OP_MODE_ADDR 0x1520 118*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW7_OP_MODE_SHIFT 7 119*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW8_OP_MODE_ADDR 0x1520 120*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW8_OP_MODE_SHIFT 8 121*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW9_OP_MODE_ADDR 0x1520 122*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW9_OP_MODE_SHIFT 9 123*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW10_OP_MODE_ADDR 0x1520 124*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW10_OP_MODE_SHIFT 10 125*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW11_OP_MODE_ADDR 0x1520 126*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW11_OP_MODE_SHIFT 11 127*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW12_OP_MODE_ADDR 0x1520 128*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW12_OP_MODE_SHIFT 12 129*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW13_OP_MODE_ADDR 0x1520 130*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW13_OP_MODE_SHIFT 13 131*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW14_OP_MODE_ADDR 0x1520 132*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VCORE_HW14_OP_MODE_SHIFT 14 133*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_VOSEL_SLEEP_ADDR 0x158e 134*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW0_OP_EN_ADDR 0x1594 135*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW1_OP_EN_ADDR 0x1594 136*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW2_OP_EN_ADDR 0x1594 137*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW3_OP_EN_ADDR 0x1594 138*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW4_OP_EN_ADDR 0x1594 139*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW5_OP_EN_ADDR 0x1594 140*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW6_OP_EN_ADDR 0x1594 141*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW7_OP_EN_ADDR 0x1594 142*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW8_OP_EN_ADDR 0x1594 143*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW9_OP_EN_ADDR 0x1594 144*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW10_OP_EN_ADDR 0x1594 145*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW11_OP_EN_ADDR 0x1594 146*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW12_OP_EN_ADDR 0x1594 147*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW13_OP_EN_ADDR 0x1594 148*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW14_OP_EN_ADDR 0x1594 149*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_SW_OP_EN_ADDR 0x1594 150*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW0_OP_CFG_ADDR 0x159a 151*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW1_OP_CFG_ADDR 0x159a 152*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW2_OP_CFG_ADDR 0x159a 153*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW3_OP_CFG_ADDR 0x159a 154*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW4_OP_CFG_ADDR 0x159a 155*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW5_OP_CFG_ADDR 0x159a 156*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW6_OP_CFG_ADDR 0x159a 157*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW7_OP_CFG_ADDR 0x159a 158*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW8_OP_CFG_ADDR 0x159a 159*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW9_OP_CFG_ADDR 0x159a 160*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW10_OP_CFG_ADDR 0x159a 161*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW11_OP_CFG_ADDR 0x159a 162*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW12_OP_CFG_ADDR 0x159a 163*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW13_OP_CFG_ADDR 0x159a 164*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW14_OP_CFG_ADDR 0x159a 165*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW0_OP_MODE_ADDR 0x15a0 166*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW0_OP_MODE_SHIFT 0 167*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW1_OP_MODE_ADDR 0x15a0 168*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW1_OP_MODE_SHIFT 1 169*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW2_OP_MODE_ADDR 0x15a0 170*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW2_OP_MODE_SHIFT 2 171*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW3_OP_MODE_ADDR 0x15a0 172*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW3_OP_MODE_SHIFT 3 173*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW4_OP_MODE_ADDR 0x15a0 174*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW4_OP_MODE_SHIFT 4 175*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW5_OP_MODE_ADDR 0x15a0 176*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW5_OP_MODE_SHIFT 5 177*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW6_OP_MODE_ADDR 0x15a0 178*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW6_OP_MODE_SHIFT 6 179*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW7_OP_MODE_ADDR 0x15a0 180*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW7_OP_MODE_SHIFT 7 181*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW8_OP_MODE_ADDR 0x15a0 182*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW8_OP_MODE_SHIFT 8 183*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW9_OP_MODE_ADDR 0x15a0 184*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW9_OP_MODE_SHIFT 9 185*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW10_OP_MODE_ADDR 0x15a0 186*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW10_OP_MODE_SHIFT 10 187*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW11_OP_MODE_ADDR 0x15a0 188*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW11_OP_MODE_SHIFT 11 189*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW12_OP_MODE_ADDR 0x15a0 190*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW12_OP_MODE_SHIFT 12 191*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW13_OP_MODE_ADDR 0x15a0 192*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW13_OP_MODE_SHIFT 13 193*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW14_OP_MODE_ADDR 0x15a0 194*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU11_HW14_OP_MODE_SHIFT 14 195*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_VOSEL_SLEEP_ADDR 0x160e 196*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW0_OP_EN_ADDR 0x1614 197*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW1_OP_EN_ADDR 0x1614 198*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW2_OP_EN_ADDR 0x1614 199*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW3_OP_EN_ADDR 0x1614 200*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW4_OP_EN_ADDR 0x1614 201*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW5_OP_EN_ADDR 0x1614 202*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW6_OP_EN_ADDR 0x1614 203*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW7_OP_EN_ADDR 0x1614 204*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW8_OP_EN_ADDR 0x1614 205*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW9_OP_EN_ADDR 0x1614 206*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW10_OP_EN_ADDR 0x1614 207*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW11_OP_EN_ADDR 0x1614 208*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW12_OP_EN_ADDR 0x1614 209*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW13_OP_EN_ADDR 0x1614 210*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW14_OP_EN_ADDR 0x1614 211*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_SW_OP_EN_ADDR 0x1614 212*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW0_OP_CFG_ADDR 0x161a 213*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW1_OP_CFG_ADDR 0x161a 214*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW2_OP_CFG_ADDR 0x161a 215*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW3_OP_CFG_ADDR 0x161a 216*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW4_OP_CFG_ADDR 0x161a 217*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW5_OP_CFG_ADDR 0x161a 218*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW6_OP_CFG_ADDR 0x161a 219*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW7_OP_CFG_ADDR 0x161a 220*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW8_OP_CFG_ADDR 0x161a 221*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW9_OP_CFG_ADDR 0x161a 222*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW10_OP_CFG_ADDR 0x161a 223*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW11_OP_CFG_ADDR 0x161a 224*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW12_OP_CFG_ADDR 0x161a 225*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW13_OP_CFG_ADDR 0x161a 226*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW14_OP_CFG_ADDR 0x161a 227*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW0_OP_MODE_ADDR 0x1620 228*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW0_OP_MODE_SHIFT 0 229*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW1_OP_MODE_ADDR 0x1620 230*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW1_OP_MODE_SHIFT 1 231*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW2_OP_MODE_ADDR 0x1620 232*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW2_OP_MODE_SHIFT 2 233*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW3_OP_MODE_ADDR 0x1620 234*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW3_OP_MODE_SHIFT 3 235*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW4_OP_MODE_ADDR 0x1620 236*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW4_OP_MODE_SHIFT 4 237*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW5_OP_MODE_ADDR 0x1620 238*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW5_OP_MODE_SHIFT 5 239*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW6_OP_MODE_ADDR 0x1620 240*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW6_OP_MODE_SHIFT 6 241*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW7_OP_MODE_ADDR 0x1620 242*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW7_OP_MODE_SHIFT 7 243*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW8_OP_MODE_ADDR 0x1620 244*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW8_OP_MODE_SHIFT 8 245*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW9_OP_MODE_ADDR 0x1620 246*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW9_OP_MODE_SHIFT 9 247*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW10_OP_MODE_ADDR 0x1620 248*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW10_OP_MODE_SHIFT 10 249*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW11_OP_MODE_ADDR 0x1620 250*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW11_OP_MODE_SHIFT 11 251*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW12_OP_MODE_ADDR 0x1620 252*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW12_OP_MODE_SHIFT 12 253*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW13_OP_MODE_ADDR 0x1620 254*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW13_OP_MODE_SHIFT 13 255*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW14_OP_MODE_ADDR 0x1620 256*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VGPU12_HW14_OP_MODE_SHIFT 14 257*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_VOSEL_SLEEP_ADDR 0x168e 258*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW0_OP_EN_ADDR 0x1694 259*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW1_OP_EN_ADDR 0x1694 260*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW2_OP_EN_ADDR 0x1694 261*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW3_OP_EN_ADDR 0x1694 262*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW4_OP_EN_ADDR 0x1694 263*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW5_OP_EN_ADDR 0x1694 264*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW6_OP_EN_ADDR 0x1694 265*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW7_OP_EN_ADDR 0x1694 266*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW8_OP_EN_ADDR 0x1694 267*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW9_OP_EN_ADDR 0x1694 268*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW10_OP_EN_ADDR 0x1694 269*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW11_OP_EN_ADDR 0x1694 270*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW12_OP_EN_ADDR 0x1694 271*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW13_OP_EN_ADDR 0x1694 272*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW14_OP_EN_ADDR 0x1694 273*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_SW_OP_EN_ADDR 0x1694 274*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW0_OP_CFG_ADDR 0x169a 275*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW1_OP_CFG_ADDR 0x169a 276*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW2_OP_CFG_ADDR 0x169a 277*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW3_OP_CFG_ADDR 0x169a 278*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW4_OP_CFG_ADDR 0x169a 279*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW5_OP_CFG_ADDR 0x169a 280*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW6_OP_CFG_ADDR 0x169a 281*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW7_OP_CFG_ADDR 0x169a 282*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW8_OP_CFG_ADDR 0x169a 283*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW9_OP_CFG_ADDR 0x169a 284*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW10_OP_CFG_ADDR 0x169a 285*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW11_OP_CFG_ADDR 0x169a 286*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW12_OP_CFG_ADDR 0x169a 287*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW13_OP_CFG_ADDR 0x169a 288*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW14_OP_CFG_ADDR 0x169a 289*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW0_OP_MODE_ADDR 0x16a0 290*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW0_OP_MODE_SHIFT 0 291*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW1_OP_MODE_ADDR 0x16a0 292*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW1_OP_MODE_SHIFT 1 293*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW2_OP_MODE_ADDR 0x16a0 294*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW2_OP_MODE_SHIFT 2 295*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW3_OP_MODE_ADDR 0x16a0 296*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW3_OP_MODE_SHIFT 3 297*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW4_OP_MODE_ADDR 0x16a0 298*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW4_OP_MODE_SHIFT 4 299*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW5_OP_MODE_ADDR 0x16a0 300*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW5_OP_MODE_SHIFT 5 301*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW6_OP_MODE_ADDR 0x16a0 302*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW6_OP_MODE_SHIFT 6 303*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW7_OP_MODE_ADDR 0x16a0 304*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW7_OP_MODE_SHIFT 7 305*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW8_OP_MODE_ADDR 0x16a0 306*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW8_OP_MODE_SHIFT 8 307*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW9_OP_MODE_ADDR 0x16a0 308*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW9_OP_MODE_SHIFT 9 309*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW10_OP_MODE_ADDR 0x16a0 310*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW10_OP_MODE_SHIFT 10 311*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW11_OP_MODE_ADDR 0x16a0 312*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW11_OP_MODE_SHIFT 11 313*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW12_OP_MODE_ADDR 0x16a0 314*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW12_OP_MODE_SHIFT 12 315*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW13_OP_MODE_ADDR 0x16a0 316*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW13_OP_MODE_SHIFT 13 317*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW14_OP_MODE_ADDR 0x16a0 318*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VMODEM_HW14_OP_MODE_SHIFT 14 319*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_VOSEL_SLEEP_ADDR 0x170e 320*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW0_OP_EN_ADDR 0x1714 321*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW1_OP_EN_ADDR 0x1714 322*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW2_OP_EN_ADDR 0x1714 323*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW3_OP_EN_ADDR 0x1714 324*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW4_OP_EN_ADDR 0x1714 325*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW5_OP_EN_ADDR 0x1714 326*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW6_OP_EN_ADDR 0x1714 327*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW7_OP_EN_ADDR 0x1714 328*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW8_OP_EN_ADDR 0x1714 329*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW9_OP_EN_ADDR 0x1714 330*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW10_OP_EN_ADDR 0x1714 331*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW11_OP_EN_ADDR 0x1714 332*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW12_OP_EN_ADDR 0x1714 333*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW13_OP_EN_ADDR 0x1714 334*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW14_OP_EN_ADDR 0x1714 335*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_SW_OP_EN_ADDR 0x1714 336*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW0_OP_CFG_ADDR 0x171a 337*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW1_OP_CFG_ADDR 0x171a 338*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW2_OP_CFG_ADDR 0x171a 339*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW3_OP_CFG_ADDR 0x171a 340*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW4_OP_CFG_ADDR 0x171a 341*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW5_OP_CFG_ADDR 0x171a 342*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW6_OP_CFG_ADDR 0x171a 343*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW7_OP_CFG_ADDR 0x171a 344*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW8_OP_CFG_ADDR 0x171a 345*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW9_OP_CFG_ADDR 0x171a 346*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW10_OP_CFG_ADDR 0x171a 347*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW11_OP_CFG_ADDR 0x171a 348*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW12_OP_CFG_ADDR 0x171a 349*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW13_OP_CFG_ADDR 0x171a 350*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW14_OP_CFG_ADDR 0x171a 351*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW0_OP_MODE_ADDR 0x1720 352*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW0_OP_MODE_SHIFT 0 353*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW1_OP_MODE_ADDR 0x1720 354*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW1_OP_MODE_SHIFT 1 355*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW2_OP_MODE_ADDR 0x1720 356*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW2_OP_MODE_SHIFT 2 357*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW3_OP_MODE_ADDR 0x1720 358*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW3_OP_MODE_SHIFT 3 359*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW4_OP_MODE_ADDR 0x1720 360*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW4_OP_MODE_SHIFT 4 361*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW5_OP_MODE_ADDR 0x1720 362*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW5_OP_MODE_SHIFT 5 363*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW6_OP_MODE_ADDR 0x1720 364*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW6_OP_MODE_SHIFT 6 365*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW7_OP_MODE_ADDR 0x1720 366*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW7_OP_MODE_SHIFT 7 367*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW8_OP_MODE_ADDR 0x1720 368*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW8_OP_MODE_SHIFT 8 369*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW9_OP_MODE_ADDR 0x1720 370*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW9_OP_MODE_SHIFT 9 371*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW10_OP_MODE_ADDR 0x1720 372*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW10_OP_MODE_SHIFT 10 373*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW11_OP_MODE_ADDR 0x1720 374*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW11_OP_MODE_SHIFT 11 375*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW12_OP_MODE_ADDR 0x1720 376*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW12_OP_MODE_SHIFT 12 377*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW13_OP_MODE_ADDR 0x1720 378*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW13_OP_MODE_SHIFT 13 379*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW14_OP_MODE_ADDR 0x1720 380*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC1_HW14_OP_MODE_SHIFT 14 381*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_VOSEL_SLEEP_ADDR 0x178e 382*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW0_OP_EN_ADDR 0x1794 383*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW1_OP_EN_ADDR 0x1794 384*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW2_OP_EN_ADDR 0x1794 385*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW3_OP_EN_ADDR 0x1794 386*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW4_OP_EN_ADDR 0x1794 387*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW5_OP_EN_ADDR 0x1794 388*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW6_OP_EN_ADDR 0x1794 389*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW7_OP_EN_ADDR 0x1794 390*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW8_OP_EN_ADDR 0x1794 391*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW9_OP_EN_ADDR 0x1794 392*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW10_OP_EN_ADDR 0x1794 393*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW11_OP_EN_ADDR 0x1794 394*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW12_OP_EN_ADDR 0x1794 395*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW13_OP_EN_ADDR 0x1794 396*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW14_OP_EN_ADDR 0x1794 397*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_SW_OP_EN_ADDR 0x1794 398*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW0_OP_CFG_ADDR 0x179a 399*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW1_OP_CFG_ADDR 0x179a 400*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW2_OP_CFG_ADDR 0x179a 401*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW3_OP_CFG_ADDR 0x179a 402*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW4_OP_CFG_ADDR 0x179a 403*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW5_OP_CFG_ADDR 0x179a 404*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW6_OP_CFG_ADDR 0x179a 405*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW7_OP_CFG_ADDR 0x179a 406*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW8_OP_CFG_ADDR 0x179a 407*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW9_OP_CFG_ADDR 0x179a 408*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW10_OP_CFG_ADDR 0x179a 409*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW11_OP_CFG_ADDR 0x179a 410*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW12_OP_CFG_ADDR 0x179a 411*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW13_OP_CFG_ADDR 0x179a 412*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW14_OP_CFG_ADDR 0x179a 413*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW0_OP_MODE_ADDR 0x17a0 414*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW0_OP_MODE_SHIFT 0 415*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW1_OP_MODE_ADDR 0x17a0 416*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW1_OP_MODE_SHIFT 1 417*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW2_OP_MODE_ADDR 0x17a0 418*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW2_OP_MODE_SHIFT 2 419*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW3_OP_MODE_ADDR 0x17a0 420*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW3_OP_MODE_SHIFT 3 421*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW4_OP_MODE_ADDR 0x17a0 422*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW4_OP_MODE_SHIFT 4 423*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW5_OP_MODE_ADDR 0x17a0 424*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW5_OP_MODE_SHIFT 5 425*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW6_OP_MODE_ADDR 0x17a0 426*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW6_OP_MODE_SHIFT 6 427*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW7_OP_MODE_ADDR 0x17a0 428*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW7_OP_MODE_SHIFT 7 429*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW8_OP_MODE_ADDR 0x17a0 430*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW8_OP_MODE_SHIFT 8 431*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW9_OP_MODE_ADDR 0x17a0 432*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW9_OP_MODE_SHIFT 9 433*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW10_OP_MODE_ADDR 0x17a0 434*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW10_OP_MODE_SHIFT 10 435*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW11_OP_MODE_ADDR 0x17a0 436*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW11_OP_MODE_SHIFT 11 437*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW12_OP_MODE_ADDR 0x17a0 438*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW12_OP_MODE_SHIFT 12 439*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW13_OP_MODE_ADDR 0x17a0 440*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW13_OP_MODE_SHIFT 13 441*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW14_OP_MODE_ADDR 0x17a0 442*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VPROC2_HW14_OP_MODE_SHIFT 14 443*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_VOSEL_SLEEP_ADDR 0x180e 444*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW0_OP_EN_ADDR 0x1814 445*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW1_OP_EN_ADDR 0x1814 446*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW2_OP_EN_ADDR 0x1814 447*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW3_OP_EN_ADDR 0x1814 448*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW4_OP_EN_ADDR 0x1814 449*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW5_OP_EN_ADDR 0x1814 450*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW6_OP_EN_ADDR 0x1814 451*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW7_OP_EN_ADDR 0x1814 452*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW8_OP_EN_ADDR 0x1814 453*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW9_OP_EN_ADDR 0x1814 454*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW10_OP_EN_ADDR 0x1814 455*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW11_OP_EN_ADDR 0x1814 456*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW12_OP_EN_ADDR 0x1814 457*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW13_OP_EN_ADDR 0x1814 458*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW14_OP_EN_ADDR 0x1814 459*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_SW_OP_EN_ADDR 0x1814 460*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW0_OP_CFG_ADDR 0x181a 461*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW1_OP_CFG_ADDR 0x181a 462*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW2_OP_CFG_ADDR 0x181a 463*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW3_OP_CFG_ADDR 0x181a 464*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW4_OP_CFG_ADDR 0x181a 465*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW5_OP_CFG_ADDR 0x181a 466*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW6_OP_CFG_ADDR 0x181a 467*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW7_OP_CFG_ADDR 0x181a 468*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW8_OP_CFG_ADDR 0x181a 469*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW9_OP_CFG_ADDR 0x181a 470*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW10_OP_CFG_ADDR 0x181a 471*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW11_OP_CFG_ADDR 0x181a 472*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW12_OP_CFG_ADDR 0x181a 473*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW13_OP_CFG_ADDR 0x181a 474*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW14_OP_CFG_ADDR 0x181a 475*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW0_OP_MODE_ADDR 0x1820 476*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW0_OP_MODE_SHIFT 0 477*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW1_OP_MODE_ADDR 0x1820 478*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW1_OP_MODE_SHIFT 1 479*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW2_OP_MODE_ADDR 0x1820 480*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW2_OP_MODE_SHIFT 2 481*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW3_OP_MODE_ADDR 0x1820 482*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW3_OP_MODE_SHIFT 3 483*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW4_OP_MODE_ADDR 0x1820 484*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW4_OP_MODE_SHIFT 4 485*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW5_OP_MODE_ADDR 0x1820 486*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW5_OP_MODE_SHIFT 5 487*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW6_OP_MODE_ADDR 0x1820 488*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW6_OP_MODE_SHIFT 6 489*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW7_OP_MODE_ADDR 0x1820 490*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW7_OP_MODE_SHIFT 7 491*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW8_OP_MODE_ADDR 0x1820 492*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW8_OP_MODE_SHIFT 8 493*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW9_OP_MODE_ADDR 0x1820 494*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW9_OP_MODE_SHIFT 9 495*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW10_OP_MODE_ADDR 0x1820 496*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW10_OP_MODE_SHIFT 10 497*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW11_OP_MODE_ADDR 0x1820 498*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW11_OP_MODE_SHIFT 11 499*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW12_OP_MODE_ADDR 0x1820 500*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW12_OP_MODE_SHIFT 12 501*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW13_OP_MODE_ADDR 0x1820 502*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW13_OP_MODE_SHIFT 13 503*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW14_OP_MODE_ADDR 0x1820 504*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS1_HW14_OP_MODE_SHIFT 14 505*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_VOSEL_SLEEP_ADDR 0x188e 506*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW0_OP_EN_ADDR 0x1894 507*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW1_OP_EN_ADDR 0x1894 508*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW2_OP_EN_ADDR 0x1894 509*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW3_OP_EN_ADDR 0x1894 510*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW4_OP_EN_ADDR 0x1894 511*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW5_OP_EN_ADDR 0x1894 512*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW6_OP_EN_ADDR 0x1894 513*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW7_OP_EN_ADDR 0x1894 514*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW8_OP_EN_ADDR 0x1894 515*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW9_OP_EN_ADDR 0x1894 516*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW10_OP_EN_ADDR 0x1894 517*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW11_OP_EN_ADDR 0x1894 518*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW12_OP_EN_ADDR 0x1894 519*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW13_OP_EN_ADDR 0x1894 520*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW14_OP_EN_ADDR 0x1894 521*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_SW_OP_EN_ADDR 0x1894 522*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW0_OP_CFG_ADDR 0x189a 523*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW1_OP_CFG_ADDR 0x189a 524*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW2_OP_CFG_ADDR 0x189a 525*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW3_OP_CFG_ADDR 0x189a 526*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW4_OP_CFG_ADDR 0x189a 527*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW5_OP_CFG_ADDR 0x189a 528*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW6_OP_CFG_ADDR 0x189a 529*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW7_OP_CFG_ADDR 0x189a 530*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW8_OP_CFG_ADDR 0x189a 531*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW9_OP_CFG_ADDR 0x189a 532*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW10_OP_CFG_ADDR 0x189a 533*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW11_OP_CFG_ADDR 0x189a 534*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW12_OP_CFG_ADDR 0x189a 535*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW13_OP_CFG_ADDR 0x189a 536*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW14_OP_CFG_ADDR 0x189a 537*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW0_OP_MODE_ADDR 0x18a0 538*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW0_OP_MODE_SHIFT 0 539*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW1_OP_MODE_ADDR 0x18a0 540*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW1_OP_MODE_SHIFT 1 541*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW2_OP_MODE_ADDR 0x18a0 542*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW2_OP_MODE_SHIFT 2 543*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW3_OP_MODE_ADDR 0x18a0 544*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW3_OP_MODE_SHIFT 3 545*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW4_OP_MODE_ADDR 0x18a0 546*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW4_OP_MODE_SHIFT 4 547*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW5_OP_MODE_ADDR 0x18a0 548*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW5_OP_MODE_SHIFT 5 549*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW6_OP_MODE_ADDR 0x18a0 550*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW6_OP_MODE_SHIFT 6 551*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW7_OP_MODE_ADDR 0x18a0 552*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW7_OP_MODE_SHIFT 7 553*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW8_OP_MODE_ADDR 0x18a0 554*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW8_OP_MODE_SHIFT 8 555*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW9_OP_MODE_ADDR 0x18a0 556*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW9_OP_MODE_SHIFT 9 557*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW10_OP_MODE_ADDR 0x18a0 558*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW10_OP_MODE_SHIFT 10 559*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW11_OP_MODE_ADDR 0x18a0 560*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW11_OP_MODE_SHIFT 11 561*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW12_OP_MODE_ADDR 0x18a0 562*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW12_OP_MODE_SHIFT 12 563*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW13_OP_MODE_ADDR 0x18a0 564*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW13_OP_MODE_SHIFT 13 565*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW14_OP_MODE_ADDR 0x18a0 566*868b2d60SZhigang Qin #define MT6359P_RG_BUCK_VS2_HW14_OP_MODE_SHIFT 14 567*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_OP_MODE_ADDR 0x1b8a 568*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_OP_MODE_SHIFT 10 569*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW0_OP_EN_ADDR 0x1b8e 570*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW1_OP_EN_ADDR 0x1b8e 571*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW2_OP_EN_ADDR 0x1b8e 572*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW3_OP_EN_ADDR 0x1b8e 573*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW4_OP_EN_ADDR 0x1b8e 574*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW5_OP_EN_ADDR 0x1b8e 575*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW6_OP_EN_ADDR 0x1b8e 576*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW7_OP_EN_ADDR 0x1b8e 577*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW8_OP_EN_ADDR 0x1b8e 578*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW9_OP_EN_ADDR 0x1b8e 579*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW10_OP_EN_ADDR 0x1b8e 580*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW11_OP_EN_ADDR 0x1b8e 581*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW12_OP_EN_ADDR 0x1b8e 582*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW13_OP_EN_ADDR 0x1b8e 583*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW14_OP_EN_ADDR 0x1b8e 584*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_SW_OP_EN_ADDR 0x1b8e 585*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW0_OP_CFG_ADDR 0x1b94 586*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW1_OP_CFG_ADDR 0x1b94 587*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW2_OP_CFG_ADDR 0x1b94 588*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW3_OP_CFG_ADDR 0x1b94 589*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW4_OP_CFG_ADDR 0x1b94 590*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW5_OP_CFG_ADDR 0x1b94 591*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW6_OP_CFG_ADDR 0x1b94 592*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW7_OP_CFG_ADDR 0x1b94 593*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW8_OP_CFG_ADDR 0x1b94 594*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW9_OP_CFG_ADDR 0x1b94 595*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW10_OP_CFG_ADDR 0x1b94 596*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW11_OP_CFG_ADDR 0x1b94 597*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW12_OP_CFG_ADDR 0x1b94 598*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW13_OP_CFG_ADDR 0x1b94 599*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_HW14_OP_CFG_ADDR 0x1b94 600*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VFE28_SW_OP_CFG_ADDR 0x1b94 601*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_OP_MODE_ADDR 0x1b9c 602*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_OP_MODE_SHIFT 10 603*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW0_OP_EN_ADDR 0x1ba0 604*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW1_OP_EN_ADDR 0x1ba0 605*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW2_OP_EN_ADDR 0x1ba0 606*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW3_OP_EN_ADDR 0x1ba0 607*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW4_OP_EN_ADDR 0x1ba0 608*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW5_OP_EN_ADDR 0x1ba0 609*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW6_OP_EN_ADDR 0x1ba0 610*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW7_OP_EN_ADDR 0x1ba0 611*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW8_OP_EN_ADDR 0x1ba0 612*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW9_OP_EN_ADDR 0x1ba0 613*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW10_OP_EN_ADDR 0x1ba0 614*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW11_OP_EN_ADDR 0x1ba0 615*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW12_OP_EN_ADDR 0x1ba0 616*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW13_OP_EN_ADDR 0x1ba0 617*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW14_OP_EN_ADDR 0x1ba0 618*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_SW_OP_EN_ADDR 0x1ba0 619*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW0_OP_CFG_ADDR 0x1ba6 620*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW1_OP_CFG_ADDR 0x1ba6 621*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW2_OP_CFG_ADDR 0x1ba6 622*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW3_OP_CFG_ADDR 0x1ba6 623*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW4_OP_CFG_ADDR 0x1ba6 624*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW5_OP_CFG_ADDR 0x1ba6 625*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW6_OP_CFG_ADDR 0x1ba6 626*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW7_OP_CFG_ADDR 0x1ba6 627*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW8_OP_CFG_ADDR 0x1ba6 628*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW9_OP_CFG_ADDR 0x1ba6 629*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW10_OP_CFG_ADDR 0x1ba6 630*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW11_OP_CFG_ADDR 0x1ba6 631*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW12_OP_CFG_ADDR 0x1ba6 632*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW13_OP_CFG_ADDR 0x1ba6 633*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_HW14_OP_CFG_ADDR 0x1ba6 634*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VXO22_SW_OP_CFG_ADDR 0x1ba6 635*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_OP_MODE_ADDR 0x1bae 636*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_OP_MODE_SHIFT 10 637*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW0_OP_EN_ADDR 0x1bb2 638*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW1_OP_EN_ADDR 0x1bb2 639*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW2_OP_EN_ADDR 0x1bb2 640*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW3_OP_EN_ADDR 0x1bb2 641*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW4_OP_EN_ADDR 0x1bb2 642*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW5_OP_EN_ADDR 0x1bb2 643*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW6_OP_EN_ADDR 0x1bb2 644*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW7_OP_EN_ADDR 0x1bb2 645*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW8_OP_EN_ADDR 0x1bb2 646*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW9_OP_EN_ADDR 0x1bb2 647*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW10_OP_EN_ADDR 0x1bb2 648*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW11_OP_EN_ADDR 0x1bb2 649*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW12_OP_EN_ADDR 0x1bb2 650*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW13_OP_EN_ADDR 0x1bb2 651*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW14_OP_EN_ADDR 0x1bb2 652*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_SW_OP_EN_ADDR 0x1bb2 653*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW0_OP_CFG_ADDR 0x1bb8 654*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW1_OP_CFG_ADDR 0x1bb8 655*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW2_OP_CFG_ADDR 0x1bb8 656*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW3_OP_CFG_ADDR 0x1bb8 657*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW4_OP_CFG_ADDR 0x1bb8 658*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW5_OP_CFG_ADDR 0x1bb8 659*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW6_OP_CFG_ADDR 0x1bb8 660*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW7_OP_CFG_ADDR 0x1bb8 661*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW8_OP_CFG_ADDR 0x1bb8 662*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW9_OP_CFG_ADDR 0x1bb8 663*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW10_OP_CFG_ADDR 0x1bb8 664*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW11_OP_CFG_ADDR 0x1bb8 665*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW12_OP_CFG_ADDR 0x1bb8 666*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW13_OP_CFG_ADDR 0x1bb8 667*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_HW14_OP_CFG_ADDR 0x1bb8 668*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF18_SW_OP_CFG_ADDR 0x1bb8 669*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_OP_MODE_ADDR 0x1bc0 670*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_OP_MODE_SHIFT 10 671*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW0_OP_EN_ADDR 0x1bc4 672*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW1_OP_EN_ADDR 0x1bc4 673*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW2_OP_EN_ADDR 0x1bc4 674*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW3_OP_EN_ADDR 0x1bc4 675*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW4_OP_EN_ADDR 0x1bc4 676*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW5_OP_EN_ADDR 0x1bc4 677*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW6_OP_EN_ADDR 0x1bc4 678*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW7_OP_EN_ADDR 0x1bc4 679*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW8_OP_EN_ADDR 0x1bc4 680*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW9_OP_EN_ADDR 0x1bc4 681*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW10_OP_EN_ADDR 0x1bc4 682*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW11_OP_EN_ADDR 0x1bc4 683*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW12_OP_EN_ADDR 0x1bc4 684*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW13_OP_EN_ADDR 0x1bc4 685*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW14_OP_EN_ADDR 0x1bc4 686*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_SW_OP_EN_ADDR 0x1bc4 687*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW0_OP_CFG_ADDR 0x1bca 688*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW1_OP_CFG_ADDR 0x1bca 689*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW2_OP_CFG_ADDR 0x1bca 690*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW3_OP_CFG_ADDR 0x1bca 691*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW4_OP_CFG_ADDR 0x1bca 692*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW5_OP_CFG_ADDR 0x1bca 693*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW6_OP_CFG_ADDR 0x1bca 694*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW7_OP_CFG_ADDR 0x1bca 695*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW8_OP_CFG_ADDR 0x1bca 696*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW9_OP_CFG_ADDR 0x1bca 697*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW10_OP_CFG_ADDR 0x1bca 698*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW11_OP_CFG_ADDR 0x1bca 699*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW12_OP_CFG_ADDR 0x1bca 700*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW13_OP_CFG_ADDR 0x1bca 701*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_HW14_OP_CFG_ADDR 0x1bca 702*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRF12_SW_OP_CFG_ADDR 0x1bca 703*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_OP_MODE_ADDR 0x1bd2 704*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_OP_MODE_SHIFT 10 705*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW0_OP_EN_ADDR 0x1bd6 706*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW1_OP_EN_ADDR 0x1bd6 707*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW2_OP_EN_ADDR 0x1bd6 708*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW3_OP_EN_ADDR 0x1bd6 709*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW4_OP_EN_ADDR 0x1bd6 710*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW5_OP_EN_ADDR 0x1bd6 711*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW6_OP_EN_ADDR 0x1bd6 712*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW7_OP_EN_ADDR 0x1bd6 713*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW8_OP_EN_ADDR 0x1bd6 714*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW9_OP_EN_ADDR 0x1bd6 715*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW10_OP_EN_ADDR 0x1bd6 716*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW11_OP_EN_ADDR 0x1bd6 717*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW12_OP_EN_ADDR 0x1bd6 718*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW13_OP_EN_ADDR 0x1bd6 719*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW14_OP_EN_ADDR 0x1bd6 720*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_SW_OP_EN_ADDR 0x1bd6 721*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW0_OP_CFG_ADDR 0x1bdc 722*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW1_OP_CFG_ADDR 0x1bdc 723*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW2_OP_CFG_ADDR 0x1bdc 724*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW3_OP_CFG_ADDR 0x1bdc 725*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW4_OP_CFG_ADDR 0x1bdc 726*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW5_OP_CFG_ADDR 0x1bdc 727*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW6_OP_CFG_ADDR 0x1bdc 728*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW7_OP_CFG_ADDR 0x1bdc 729*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW8_OP_CFG_ADDR 0x1bdc 730*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW9_OP_CFG_ADDR 0x1bdc 731*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW10_OP_CFG_ADDR 0x1bdc 732*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW11_OP_CFG_ADDR 0x1bdc 733*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW12_OP_CFG_ADDR 0x1bdc 734*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW13_OP_CFG_ADDR 0x1bdc 735*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_HW14_OP_CFG_ADDR 0x1bdc 736*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEFUSE_SW_OP_CFG_ADDR 0x1bdc 737*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_OP_MODE_ADDR 0x1be4 738*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_OP_MODE_SHIFT 10 739*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW0_OP_EN_ADDR 0x1be8 740*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW1_OP_EN_ADDR 0x1be8 741*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW2_OP_EN_ADDR 0x1be8 742*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW3_OP_EN_ADDR 0x1be8 743*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW4_OP_EN_ADDR 0x1be8 744*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW5_OP_EN_ADDR 0x1be8 745*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW6_OP_EN_ADDR 0x1be8 746*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW7_OP_EN_ADDR 0x1be8 747*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW8_OP_EN_ADDR 0x1be8 748*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW9_OP_EN_ADDR 0x1be8 749*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW10_OP_EN_ADDR 0x1be8 750*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW11_OP_EN_ADDR 0x1be8 751*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW12_OP_EN_ADDR 0x1be8 752*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW13_OP_EN_ADDR 0x1be8 753*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW14_OP_EN_ADDR 0x1be8 754*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_SW_OP_EN_ADDR 0x1be8 755*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW0_OP_CFG_ADDR 0x1bee 756*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW1_OP_CFG_ADDR 0x1bee 757*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW2_OP_CFG_ADDR 0x1bee 758*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW3_OP_CFG_ADDR 0x1bee 759*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW4_OP_CFG_ADDR 0x1bee 760*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW5_OP_CFG_ADDR 0x1bee 761*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW6_OP_CFG_ADDR 0x1bee 762*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW7_OP_CFG_ADDR 0x1bee 763*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW8_OP_CFG_ADDR 0x1bee 764*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW9_OP_CFG_ADDR 0x1bee 765*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW10_OP_CFG_ADDR 0x1bee 766*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW11_OP_CFG_ADDR 0x1bee 767*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW12_OP_CFG_ADDR 0x1bee 768*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW13_OP_CFG_ADDR 0x1bee 769*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_HW14_OP_CFG_ADDR 0x1bee 770*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_1_SW_OP_CFG_ADDR 0x1bee 771*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_OP_MODE_ADDR 0x1c0a 772*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_OP_MODE_SHIFT 10 773*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW0_OP_EN_ADDR 0x1c0e 774*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW1_OP_EN_ADDR 0x1c0e 775*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW2_OP_EN_ADDR 0x1c0e 776*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW3_OP_EN_ADDR 0x1c0e 777*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW4_OP_EN_ADDR 0x1c0e 778*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW5_OP_EN_ADDR 0x1c0e 779*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW6_OP_EN_ADDR 0x1c0e 780*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW7_OP_EN_ADDR 0x1c0e 781*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW8_OP_EN_ADDR 0x1c0e 782*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW9_OP_EN_ADDR 0x1c0e 783*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW10_OP_EN_ADDR 0x1c0e 784*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW11_OP_EN_ADDR 0x1c0e 785*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW12_OP_EN_ADDR 0x1c0e 786*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW13_OP_EN_ADDR 0x1c0e 787*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW14_OP_EN_ADDR 0x1c0e 788*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_SW_OP_EN_ADDR 0x1c0e 789*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW0_OP_CFG_ADDR 0x1c14 790*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW1_OP_CFG_ADDR 0x1c14 791*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW2_OP_CFG_ADDR 0x1c14 792*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW3_OP_CFG_ADDR 0x1c14 793*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW4_OP_CFG_ADDR 0x1c14 794*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW5_OP_CFG_ADDR 0x1c14 795*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW6_OP_CFG_ADDR 0x1c14 796*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW7_OP_CFG_ADDR 0x1c14 797*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW8_OP_CFG_ADDR 0x1c14 798*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW9_OP_CFG_ADDR 0x1c14 799*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW10_OP_CFG_ADDR 0x1c14 800*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW11_OP_CFG_ADDR 0x1c14 801*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW12_OP_CFG_ADDR 0x1c14 802*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW13_OP_CFG_ADDR 0x1c14 803*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_HW14_OP_CFG_ADDR 0x1c14 804*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN33_2_SW_OP_CFG_ADDR 0x1c14 805*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_OP_MODE_ADDR 0x1c1e 806*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_OP_MODE_SHIFT 10 807*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW0_OP_EN_ADDR 0x1c22 808*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW1_OP_EN_ADDR 0x1c22 809*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW2_OP_EN_ADDR 0x1c22 810*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW3_OP_EN_ADDR 0x1c22 811*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW4_OP_EN_ADDR 0x1c22 812*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW5_OP_EN_ADDR 0x1c22 813*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW6_OP_EN_ADDR 0x1c22 814*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW7_OP_EN_ADDR 0x1c22 815*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW8_OP_EN_ADDR 0x1c22 816*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW9_OP_EN_ADDR 0x1c22 817*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW10_OP_EN_ADDR 0x1c22 818*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW11_OP_EN_ADDR 0x1c22 819*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW12_OP_EN_ADDR 0x1c22 820*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW13_OP_EN_ADDR 0x1c22 821*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW14_OP_EN_ADDR 0x1c22 822*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_SW_OP_EN_ADDR 0x1c22 823*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW0_OP_CFG_ADDR 0x1c28 824*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW1_OP_CFG_ADDR 0x1c28 825*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW2_OP_CFG_ADDR 0x1c28 826*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW3_OP_CFG_ADDR 0x1c28 827*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW4_OP_CFG_ADDR 0x1c28 828*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW5_OP_CFG_ADDR 0x1c28 829*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW6_OP_CFG_ADDR 0x1c28 830*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW7_OP_CFG_ADDR 0x1c28 831*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW8_OP_CFG_ADDR 0x1c28 832*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW9_OP_CFG_ADDR 0x1c28 833*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW10_OP_CFG_ADDR 0x1c28 834*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW11_OP_CFG_ADDR 0x1c28 835*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW12_OP_CFG_ADDR 0x1c28 836*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW13_OP_CFG_ADDR 0x1c28 837*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_HW14_OP_CFG_ADDR 0x1c28 838*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN13_SW_OP_CFG_ADDR 0x1c28 839*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_OP_MODE_ADDR 0x1c30 840*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_OP_MODE_SHIFT 10 841*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW0_OP_EN_ADDR 0x1c34 842*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW1_OP_EN_ADDR 0x1c34 843*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW2_OP_EN_ADDR 0x1c34 844*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW3_OP_EN_ADDR 0x1c34 845*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW4_OP_EN_ADDR 0x1c34 846*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW5_OP_EN_ADDR 0x1c34 847*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW6_OP_EN_ADDR 0x1c34 848*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW7_OP_EN_ADDR 0x1c34 849*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW8_OP_EN_ADDR 0x1c34 850*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW9_OP_EN_ADDR 0x1c34 851*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW10_OP_EN_ADDR 0x1c34 852*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW11_OP_EN_ADDR 0x1c34 853*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW12_OP_EN_ADDR 0x1c34 854*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW13_OP_EN_ADDR 0x1c34 855*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW14_OP_EN_ADDR 0x1c34 856*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_SW_OP_EN_ADDR 0x1c34 857*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW0_OP_CFG_ADDR 0x1c3a 858*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW1_OP_CFG_ADDR 0x1c3a 859*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW2_OP_CFG_ADDR 0x1c3a 860*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW3_OP_CFG_ADDR 0x1c3a 861*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW4_OP_CFG_ADDR 0x1c3a 862*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW5_OP_CFG_ADDR 0x1c3a 863*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW6_OP_CFG_ADDR 0x1c3a 864*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW7_OP_CFG_ADDR 0x1c3a 865*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW8_OP_CFG_ADDR 0x1c3a 866*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW9_OP_CFG_ADDR 0x1c3a 867*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW10_OP_CFG_ADDR 0x1c3a 868*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW11_OP_CFG_ADDR 0x1c3a 869*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW12_OP_CFG_ADDR 0x1c3a 870*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW13_OP_CFG_ADDR 0x1c3a 871*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_HW14_OP_CFG_ADDR 0x1c3a 872*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCN18_SW_OP_CFG_ADDR 0x1c3a 873*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_OP_MODE_ADDR 0x1c42 874*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_OP_MODE_SHIFT 10 875*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW0_OP_EN_ADDR 0x1c46 876*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW1_OP_EN_ADDR 0x1c46 877*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW2_OP_EN_ADDR 0x1c46 878*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW3_OP_EN_ADDR 0x1c46 879*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW4_OP_EN_ADDR 0x1c46 880*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW5_OP_EN_ADDR 0x1c46 881*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW6_OP_EN_ADDR 0x1c46 882*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW7_OP_EN_ADDR 0x1c46 883*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW8_OP_EN_ADDR 0x1c46 884*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW9_OP_EN_ADDR 0x1c46 885*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW10_OP_EN_ADDR 0x1c46 886*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW11_OP_EN_ADDR 0x1c46 887*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW12_OP_EN_ADDR 0x1c46 888*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW13_OP_EN_ADDR 0x1c46 889*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW14_OP_EN_ADDR 0x1c46 890*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_SW_OP_EN_ADDR 0x1c46 891*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW0_OP_CFG_ADDR 0x1c4c 892*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW1_OP_CFG_ADDR 0x1c4c 893*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW2_OP_CFG_ADDR 0x1c4c 894*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW3_OP_CFG_ADDR 0x1c4c 895*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW4_OP_CFG_ADDR 0x1c4c 896*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW5_OP_CFG_ADDR 0x1c4c 897*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW6_OP_CFG_ADDR 0x1c4c 898*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW7_OP_CFG_ADDR 0x1c4c 899*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW8_OP_CFG_ADDR 0x1c4c 900*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW9_OP_CFG_ADDR 0x1c4c 901*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW10_OP_CFG_ADDR 0x1c4c 902*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW11_OP_CFG_ADDR 0x1c4c 903*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW12_OP_CFG_ADDR 0x1c4c 904*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW13_OP_CFG_ADDR 0x1c4c 905*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_HW14_OP_CFG_ADDR 0x1c4c 906*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA09_SW_OP_CFG_ADDR 0x1c4c 907*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_OP_MODE_ADDR 0x1c54 908*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_OP_MODE_SHIFT 10 909*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW0_OP_EN_ADDR 0x1c58 910*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW1_OP_EN_ADDR 0x1c58 911*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW2_OP_EN_ADDR 0x1c58 912*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW3_OP_EN_ADDR 0x1c58 913*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW4_OP_EN_ADDR 0x1c58 914*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW5_OP_EN_ADDR 0x1c58 915*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW6_OP_EN_ADDR 0x1c58 916*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW7_OP_EN_ADDR 0x1c58 917*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW8_OP_EN_ADDR 0x1c58 918*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW9_OP_EN_ADDR 0x1c58 919*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW10_OP_EN_ADDR 0x1c58 920*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW11_OP_EN_ADDR 0x1c58 921*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW12_OP_EN_ADDR 0x1c58 922*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW13_OP_EN_ADDR 0x1c58 923*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW14_OP_EN_ADDR 0x1c58 924*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_SW_OP_EN_ADDR 0x1c58 925*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW0_OP_CFG_ADDR 0x1c5e 926*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW1_OP_CFG_ADDR 0x1c5e 927*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW2_OP_CFG_ADDR 0x1c5e 928*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW3_OP_CFG_ADDR 0x1c5e 929*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW4_OP_CFG_ADDR 0x1c5e 930*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW5_OP_CFG_ADDR 0x1c5e 931*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW6_OP_CFG_ADDR 0x1c5e 932*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW7_OP_CFG_ADDR 0x1c5e 933*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW8_OP_CFG_ADDR 0x1c5e 934*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW9_OP_CFG_ADDR 0x1c5e 935*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW10_OP_CFG_ADDR 0x1c5e 936*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW11_OP_CFG_ADDR 0x1c5e 937*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW12_OP_CFG_ADDR 0x1c5e 938*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW13_OP_CFG_ADDR 0x1c5e 939*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_HW14_OP_CFG_ADDR 0x1c5e 940*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VCAMIO_SW_OP_CFG_ADDR 0x1c5e 941*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_OP_MODE_ADDR 0x1c66 942*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_OP_MODE_SHIFT 10 943*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW0_OP_EN_ADDR 0x1c6a 944*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW1_OP_EN_ADDR 0x1c6a 945*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW2_OP_EN_ADDR 0x1c6a 946*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW3_OP_EN_ADDR 0x1c6a 947*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW4_OP_EN_ADDR 0x1c6a 948*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW5_OP_EN_ADDR 0x1c6a 949*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW6_OP_EN_ADDR 0x1c6a 950*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW7_OP_EN_ADDR 0x1c6a 951*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW8_OP_EN_ADDR 0x1c6a 952*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW9_OP_EN_ADDR 0x1c6a 953*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW10_OP_EN_ADDR 0x1c6a 954*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW11_OP_EN_ADDR 0x1c6a 955*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW12_OP_EN_ADDR 0x1c6a 956*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW13_OP_EN_ADDR 0x1c6a 957*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW14_OP_EN_ADDR 0x1c6a 958*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_SW_OP_EN_ADDR 0x1c6a 959*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW0_OP_CFG_ADDR 0x1c70 960*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW1_OP_CFG_ADDR 0x1c70 961*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW2_OP_CFG_ADDR 0x1c70 962*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW3_OP_CFG_ADDR 0x1c70 963*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW4_OP_CFG_ADDR 0x1c70 964*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW5_OP_CFG_ADDR 0x1c70 965*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW6_OP_CFG_ADDR 0x1c70 966*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW7_OP_CFG_ADDR 0x1c70 967*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW8_OP_CFG_ADDR 0x1c70 968*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW9_OP_CFG_ADDR 0x1c70 969*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW10_OP_CFG_ADDR 0x1c70 970*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW11_OP_CFG_ADDR 0x1c70 971*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW12_OP_CFG_ADDR 0x1c70 972*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW13_OP_CFG_ADDR 0x1c70 973*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_HW14_OP_CFG_ADDR 0x1c70 974*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VA12_SW_OP_CFG_ADDR 0x1c70 975*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_OP_MODE_ADDR 0x1c8a 976*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_OP_MODE_SHIFT 10 977*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW0_OP_EN_ADDR 0x1c8e 978*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW1_OP_EN_ADDR 0x1c8e 979*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW2_OP_EN_ADDR 0x1c8e 980*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW3_OP_EN_ADDR 0x1c8e 981*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW4_OP_EN_ADDR 0x1c8e 982*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW5_OP_EN_ADDR 0x1c8e 983*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW6_OP_EN_ADDR 0x1c8e 984*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW7_OP_EN_ADDR 0x1c8e 985*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW8_OP_EN_ADDR 0x1c8e 986*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW9_OP_EN_ADDR 0x1c8e 987*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW10_OP_EN_ADDR 0x1c8e 988*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW11_OP_EN_ADDR 0x1c8e 989*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW12_OP_EN_ADDR 0x1c8e 990*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW13_OP_EN_ADDR 0x1c8e 991*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW14_OP_EN_ADDR 0x1c8e 992*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_SW_OP_EN_ADDR 0x1c8e 993*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW0_OP_CFG_ADDR 0x1c94 994*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW1_OP_CFG_ADDR 0x1c94 995*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW2_OP_CFG_ADDR 0x1c94 996*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW3_OP_CFG_ADDR 0x1c94 997*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW4_OP_CFG_ADDR 0x1c94 998*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW5_OP_CFG_ADDR 0x1c94 999*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW6_OP_CFG_ADDR 0x1c94 1000*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW7_OP_CFG_ADDR 0x1c94 1001*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW8_OP_CFG_ADDR 0x1c94 1002*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW9_OP_CFG_ADDR 0x1c94 1003*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW10_OP_CFG_ADDR 0x1c94 1004*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW11_OP_CFG_ADDR 0x1c94 1005*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW12_OP_CFG_ADDR 0x1c94 1006*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW13_OP_CFG_ADDR 0x1c94 1007*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_HW14_OP_CFG_ADDR 0x1c94 1008*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUX18_SW_OP_CFG_ADDR 0x1c94 1009*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_OP_MODE_ADDR 0x1c9c 1010*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_OP_MODE_SHIFT 10 1011*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW0_OP_EN_ADDR 0x1ca0 1012*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW1_OP_EN_ADDR 0x1ca0 1013*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW2_OP_EN_ADDR 0x1ca0 1014*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW3_OP_EN_ADDR 0x1ca0 1015*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW4_OP_EN_ADDR 0x1ca0 1016*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW5_OP_EN_ADDR 0x1ca0 1017*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW6_OP_EN_ADDR 0x1ca0 1018*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW7_OP_EN_ADDR 0x1ca0 1019*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW8_OP_EN_ADDR 0x1ca0 1020*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW9_OP_EN_ADDR 0x1ca0 1021*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW10_OP_EN_ADDR 0x1ca0 1022*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW11_OP_EN_ADDR 0x1ca0 1023*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW12_OP_EN_ADDR 0x1ca0 1024*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW13_OP_EN_ADDR 0x1ca0 1025*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW14_OP_EN_ADDR 0x1ca0 1026*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_SW_OP_EN_ADDR 0x1ca0 1027*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW0_OP_CFG_ADDR 0x1ca6 1028*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW1_OP_CFG_ADDR 0x1ca6 1029*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW2_OP_CFG_ADDR 0x1ca6 1030*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW3_OP_CFG_ADDR 0x1ca6 1031*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW4_OP_CFG_ADDR 0x1ca6 1032*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW5_OP_CFG_ADDR 0x1ca6 1033*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW6_OP_CFG_ADDR 0x1ca6 1034*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW7_OP_CFG_ADDR 0x1ca6 1035*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW8_OP_CFG_ADDR 0x1ca6 1036*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW9_OP_CFG_ADDR 0x1ca6 1037*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW10_OP_CFG_ADDR 0x1ca6 1038*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW11_OP_CFG_ADDR 0x1ca6 1039*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW12_OP_CFG_ADDR 0x1ca6 1040*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW13_OP_CFG_ADDR 0x1ca6 1041*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_HW14_OP_CFG_ADDR 0x1ca6 1042*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VAUD18_SW_OP_CFG_ADDR 0x1ca6 1043*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_OP_MODE_ADDR 0x1cae 1044*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_OP_MODE_SHIFT 10 1045*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW0_OP_EN_ADDR 0x1cb2 1046*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW1_OP_EN_ADDR 0x1cb2 1047*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW2_OP_EN_ADDR 0x1cb2 1048*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW3_OP_EN_ADDR 0x1cb2 1049*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW4_OP_EN_ADDR 0x1cb2 1050*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW5_OP_EN_ADDR 0x1cb2 1051*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW6_OP_EN_ADDR 0x1cb2 1052*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW7_OP_EN_ADDR 0x1cb2 1053*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW8_OP_EN_ADDR 0x1cb2 1054*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW9_OP_EN_ADDR 0x1cb2 1055*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW10_OP_EN_ADDR 0x1cb2 1056*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW11_OP_EN_ADDR 0x1cb2 1057*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW12_OP_EN_ADDR 0x1cb2 1058*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW13_OP_EN_ADDR 0x1cb2 1059*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW14_OP_EN_ADDR 0x1cb2 1060*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_SW_OP_EN_ADDR 0x1cb2 1061*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW0_OP_CFG_ADDR 0x1cb8 1062*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW1_OP_CFG_ADDR 0x1cb8 1063*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW2_OP_CFG_ADDR 0x1cb8 1064*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW3_OP_CFG_ADDR 0x1cb8 1065*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW4_OP_CFG_ADDR 0x1cb8 1066*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW5_OP_CFG_ADDR 0x1cb8 1067*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW6_OP_CFG_ADDR 0x1cb8 1068*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW7_OP_CFG_ADDR 0x1cb8 1069*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW8_OP_CFG_ADDR 0x1cb8 1070*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW9_OP_CFG_ADDR 0x1cb8 1071*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW10_OP_CFG_ADDR 0x1cb8 1072*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW11_OP_CFG_ADDR 0x1cb8 1073*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW12_OP_CFG_ADDR 0x1cb8 1074*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW13_OP_CFG_ADDR 0x1cb8 1075*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_HW14_OP_CFG_ADDR 0x1cb8 1076*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO18_SW_OP_CFG_ADDR 0x1cb8 1077*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_OP_MODE_ADDR 0x1cc0 1078*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_OP_MODE_SHIFT 10 1079*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW0_OP_EN_ADDR 0x1cc4 1080*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW1_OP_EN_ADDR 0x1cc4 1081*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW2_OP_EN_ADDR 0x1cc4 1082*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW3_OP_EN_ADDR 0x1cc4 1083*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW4_OP_EN_ADDR 0x1cc4 1084*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW5_OP_EN_ADDR 0x1cc4 1085*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW6_OP_EN_ADDR 0x1cc4 1086*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW7_OP_EN_ADDR 0x1cc4 1087*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW8_OP_EN_ADDR 0x1cc4 1088*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW9_OP_EN_ADDR 0x1cc4 1089*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW10_OP_EN_ADDR 0x1cc4 1090*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW11_OP_EN_ADDR 0x1cc4 1091*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW12_OP_EN_ADDR 0x1cc4 1092*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW13_OP_EN_ADDR 0x1cc4 1093*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW14_OP_EN_ADDR 0x1cc4 1094*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_SW_OP_EN_ADDR 0x1cc4 1095*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW0_OP_CFG_ADDR 0x1cca 1096*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW1_OP_CFG_ADDR 0x1cca 1097*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW2_OP_CFG_ADDR 0x1cca 1098*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW3_OP_CFG_ADDR 0x1cca 1099*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW4_OP_CFG_ADDR 0x1cca 1100*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW5_OP_CFG_ADDR 0x1cca 1101*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW6_OP_CFG_ADDR 0x1cca 1102*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW7_OP_CFG_ADDR 0x1cca 1103*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW8_OP_CFG_ADDR 0x1cca 1104*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW9_OP_CFG_ADDR 0x1cca 1105*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW10_OP_CFG_ADDR 0x1cca 1106*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW11_OP_CFG_ADDR 0x1cca 1107*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW12_OP_CFG_ADDR 0x1cca 1108*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW13_OP_CFG_ADDR 0x1cca 1109*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_HW14_OP_CFG_ADDR 0x1cca 1110*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VEMC_SW_OP_CFG_ADDR 0x1cca 1111*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_OP_MODE_ADDR 0x1cd2 1112*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_OP_MODE_SHIFT 10 1113*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW0_OP_EN_ADDR 0x1cd6 1114*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW1_OP_EN_ADDR 0x1cd6 1115*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW2_OP_EN_ADDR 0x1cd6 1116*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW3_OP_EN_ADDR 0x1cd6 1117*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW4_OP_EN_ADDR 0x1cd6 1118*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW5_OP_EN_ADDR 0x1cd6 1119*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW6_OP_EN_ADDR 0x1cd6 1120*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW7_OP_EN_ADDR 0x1cd6 1121*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW8_OP_EN_ADDR 0x1cd6 1122*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW9_OP_EN_ADDR 0x1cd6 1123*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW10_OP_EN_ADDR 0x1cd6 1124*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW11_OP_EN_ADDR 0x1cd6 1125*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW12_OP_EN_ADDR 0x1cd6 1126*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW13_OP_EN_ADDR 0x1cd6 1127*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW14_OP_EN_ADDR 0x1cd6 1128*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_SW_OP_EN_ADDR 0x1cd6 1129*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW0_OP_CFG_ADDR 0x1cdc 1130*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW1_OP_CFG_ADDR 0x1cdc 1131*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW2_OP_CFG_ADDR 0x1cdc 1132*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW3_OP_CFG_ADDR 0x1cdc 1133*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW4_OP_CFG_ADDR 0x1cdc 1134*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW5_OP_CFG_ADDR 0x1cdc 1135*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW6_OP_CFG_ADDR 0x1cdc 1136*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW7_OP_CFG_ADDR 0x1cdc 1137*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW8_OP_CFG_ADDR 0x1cdc 1138*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW9_OP_CFG_ADDR 0x1cdc 1139*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW10_OP_CFG_ADDR 0x1cdc 1140*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW11_OP_CFG_ADDR 0x1cdc 1141*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW12_OP_CFG_ADDR 0x1cdc 1142*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW13_OP_CFG_ADDR 0x1cdc 1143*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_HW14_OP_CFG_ADDR 0x1cdc 1144*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM1_SW_OP_CFG_ADDR 0x1cdc 1145*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_OP_MODE_ADDR 0x1ce4 1146*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_OP_MODE_SHIFT 10 1147*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW0_OP_EN_ADDR 0x1ce8 1148*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW1_OP_EN_ADDR 0x1ce8 1149*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW2_OP_EN_ADDR 0x1ce8 1150*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW3_OP_EN_ADDR 0x1ce8 1151*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW4_OP_EN_ADDR 0x1ce8 1152*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW5_OP_EN_ADDR 0x1ce8 1153*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW6_OP_EN_ADDR 0x1ce8 1154*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW7_OP_EN_ADDR 0x1ce8 1155*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW8_OP_EN_ADDR 0x1ce8 1156*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW9_OP_EN_ADDR 0x1ce8 1157*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW10_OP_EN_ADDR 0x1ce8 1158*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW11_OP_EN_ADDR 0x1ce8 1159*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW12_OP_EN_ADDR 0x1ce8 1160*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW13_OP_EN_ADDR 0x1ce8 1161*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW14_OP_EN_ADDR 0x1ce8 1162*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_SW_OP_EN_ADDR 0x1ce8 1163*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW0_OP_CFG_ADDR 0x1cee 1164*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW1_OP_CFG_ADDR 0x1cee 1165*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW2_OP_CFG_ADDR 0x1cee 1166*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW3_OP_CFG_ADDR 0x1cee 1167*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW4_OP_CFG_ADDR 0x1cee 1168*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW5_OP_CFG_ADDR 0x1cee 1169*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW6_OP_CFG_ADDR 0x1cee 1170*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW7_OP_CFG_ADDR 0x1cee 1171*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW8_OP_CFG_ADDR 0x1cee 1172*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW9_OP_CFG_ADDR 0x1cee 1173*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW10_OP_CFG_ADDR 0x1cee 1174*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW11_OP_CFG_ADDR 0x1cee 1175*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW12_OP_CFG_ADDR 0x1cee 1176*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW13_OP_CFG_ADDR 0x1cee 1177*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_HW14_OP_CFG_ADDR 0x1cee 1178*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSIM2_SW_OP_CFG_ADDR 0x1cee 1179*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_OP_MODE_ADDR 0x1d0a 1180*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_OP_MODE_SHIFT 10 1181*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW0_OP_EN_ADDR 0x1d0e 1182*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW1_OP_EN_ADDR 0x1d0e 1183*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW2_OP_EN_ADDR 0x1d0e 1184*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW3_OP_EN_ADDR 0x1d0e 1185*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW4_OP_EN_ADDR 0x1d0e 1186*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW5_OP_EN_ADDR 0x1d0e 1187*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW6_OP_EN_ADDR 0x1d0e 1188*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW7_OP_EN_ADDR 0x1d0e 1189*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW8_OP_EN_ADDR 0x1d0e 1190*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW9_OP_EN_ADDR 0x1d0e 1191*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW10_OP_EN_ADDR 0x1d0e 1192*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW11_OP_EN_ADDR 0x1d0e 1193*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW12_OP_EN_ADDR 0x1d0e 1194*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW13_OP_EN_ADDR 0x1d0e 1195*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW14_OP_EN_ADDR 0x1d0e 1196*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_SW_OP_EN_ADDR 0x1d0e 1197*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW0_OP_CFG_ADDR 0x1d14 1198*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW1_OP_CFG_ADDR 0x1d14 1199*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW2_OP_CFG_ADDR 0x1d14 1200*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW3_OP_CFG_ADDR 0x1d14 1201*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW4_OP_CFG_ADDR 0x1d14 1202*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW5_OP_CFG_ADDR 0x1d14 1203*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW6_OP_CFG_ADDR 0x1d14 1204*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW7_OP_CFG_ADDR 0x1d14 1205*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW8_OP_CFG_ADDR 0x1d14 1206*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW9_OP_CFG_ADDR 0x1d14 1207*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW10_OP_CFG_ADDR 0x1d14 1208*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW11_OP_CFG_ADDR 0x1d14 1209*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW12_OP_CFG_ADDR 0x1d14 1210*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW13_OP_CFG_ADDR 0x1d14 1211*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_HW14_OP_CFG_ADDR 0x1d14 1212*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUSB_SW_OP_CFG_ADDR 0x1d14 1213*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_OP_MODE_ADDR 0x1d1e 1214*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_OP_MODE_SHIFT 10 1215*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW0_OP_EN_ADDR 0x1d22 1216*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW1_OP_EN_ADDR 0x1d22 1217*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW2_OP_EN_ADDR 0x1d22 1218*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW3_OP_EN_ADDR 0x1d22 1219*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW4_OP_EN_ADDR 0x1d22 1220*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW5_OP_EN_ADDR 0x1d22 1221*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW6_OP_EN_ADDR 0x1d22 1222*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW7_OP_EN_ADDR 0x1d22 1223*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW8_OP_EN_ADDR 0x1d22 1224*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW9_OP_EN_ADDR 0x1d22 1225*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW10_OP_EN_ADDR 0x1d22 1226*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW11_OP_EN_ADDR 0x1d22 1227*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW12_OP_EN_ADDR 0x1d22 1228*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW13_OP_EN_ADDR 0x1d22 1229*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW14_OP_EN_ADDR 0x1d22 1230*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_SW_OP_EN_ADDR 0x1d22 1231*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW0_OP_CFG_ADDR 0x1d28 1232*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW1_OP_CFG_ADDR 0x1d28 1233*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW2_OP_CFG_ADDR 0x1d28 1234*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW3_OP_CFG_ADDR 0x1d28 1235*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW4_OP_CFG_ADDR 0x1d28 1236*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW5_OP_CFG_ADDR 0x1d28 1237*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW6_OP_CFG_ADDR 0x1d28 1238*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW7_OP_CFG_ADDR 0x1d28 1239*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW8_OP_CFG_ADDR 0x1d28 1240*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW9_OP_CFG_ADDR 0x1d28 1241*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW10_OP_CFG_ADDR 0x1d28 1242*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW11_OP_CFG_ADDR 0x1d28 1243*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW12_OP_CFG_ADDR 0x1d28 1244*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW13_OP_CFG_ADDR 0x1d28 1245*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_HW14_OP_CFG_ADDR 0x1d28 1246*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VRFCK_SW_OP_CFG_ADDR 0x1d28 1247*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_OP_MODE_ADDR 0x1d30 1248*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_OP_MODE_SHIFT 10 1249*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW0_OP_EN_ADDR 0x1d34 1250*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW1_OP_EN_ADDR 0x1d34 1251*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW2_OP_EN_ADDR 0x1d34 1252*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW3_OP_EN_ADDR 0x1d34 1253*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW4_OP_EN_ADDR 0x1d34 1254*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW5_OP_EN_ADDR 0x1d34 1255*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW6_OP_EN_ADDR 0x1d34 1256*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW7_OP_EN_ADDR 0x1d34 1257*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW8_OP_EN_ADDR 0x1d34 1258*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW9_OP_EN_ADDR 0x1d34 1259*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW10_OP_EN_ADDR 0x1d34 1260*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW11_OP_EN_ADDR 0x1d34 1261*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW12_OP_EN_ADDR 0x1d34 1262*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW13_OP_EN_ADDR 0x1d34 1263*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW14_OP_EN_ADDR 0x1d34 1264*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_SW_OP_EN_ADDR 0x1d34 1265*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW0_OP_CFG_ADDR 0x1d3a 1266*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW1_OP_CFG_ADDR 0x1d3a 1267*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW2_OP_CFG_ADDR 0x1d3a 1268*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW3_OP_CFG_ADDR 0x1d3a 1269*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW4_OP_CFG_ADDR 0x1d3a 1270*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW5_OP_CFG_ADDR 0x1d3a 1271*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW6_OP_CFG_ADDR 0x1d3a 1272*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW7_OP_CFG_ADDR 0x1d3a 1273*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW8_OP_CFG_ADDR 0x1d3a 1274*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW9_OP_CFG_ADDR 0x1d3a 1275*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW10_OP_CFG_ADDR 0x1d3a 1276*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW11_OP_CFG_ADDR 0x1d3a 1277*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW12_OP_CFG_ADDR 0x1d3a 1278*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW13_OP_CFG_ADDR 0x1d3a 1279*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_HW14_OP_CFG_ADDR 0x1d3a 1280*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBBCK_SW_OP_CFG_ADDR 0x1d3a 1281*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_OP_MODE_ADDR 0x1d42 1282*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_OP_MODE_SHIFT 10 1283*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW0_OP_EN_ADDR 0x1d46 1284*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW1_OP_EN_ADDR 0x1d46 1285*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW2_OP_EN_ADDR 0x1d46 1286*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW3_OP_EN_ADDR 0x1d46 1287*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW4_OP_EN_ADDR 0x1d46 1288*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW5_OP_EN_ADDR 0x1d46 1289*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW6_OP_EN_ADDR 0x1d46 1290*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW7_OP_EN_ADDR 0x1d46 1291*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW8_OP_EN_ADDR 0x1d46 1292*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW9_OP_EN_ADDR 0x1d46 1293*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW10_OP_EN_ADDR 0x1d46 1294*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW11_OP_EN_ADDR 0x1d46 1295*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW12_OP_EN_ADDR 0x1d46 1296*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW13_OP_EN_ADDR 0x1d46 1297*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW14_OP_EN_ADDR 0x1d46 1298*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_SW_OP_EN_ADDR 0x1d46 1299*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW0_OP_CFG_ADDR 0x1d4c 1300*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW1_OP_CFG_ADDR 0x1d4c 1301*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW2_OP_CFG_ADDR 0x1d4c 1302*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW3_OP_CFG_ADDR 0x1d4c 1303*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW4_OP_CFG_ADDR 0x1d4c 1304*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW5_OP_CFG_ADDR 0x1d4c 1305*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW6_OP_CFG_ADDR 0x1d4c 1306*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW7_OP_CFG_ADDR 0x1d4c 1307*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW8_OP_CFG_ADDR 0x1d4c 1308*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW9_OP_CFG_ADDR 0x1d4c 1309*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW10_OP_CFG_ADDR 0x1d4c 1310*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW11_OP_CFG_ADDR 0x1d4c 1311*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW12_OP_CFG_ADDR 0x1d4c 1312*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW13_OP_CFG_ADDR 0x1d4c 1313*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_HW14_OP_CFG_ADDR 0x1d4c 1314*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VBIF28_SW_OP_CFG_ADDR 0x1d4c 1315*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_OP_MODE_ADDR 0x1d54 1316*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_OP_MODE_SHIFT 10 1317*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW0_OP_EN_ADDR 0x1d58 1318*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW1_OP_EN_ADDR 0x1d58 1319*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW2_OP_EN_ADDR 0x1d58 1320*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW3_OP_EN_ADDR 0x1d58 1321*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW4_OP_EN_ADDR 0x1d58 1322*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW5_OP_EN_ADDR 0x1d58 1323*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW6_OP_EN_ADDR 0x1d58 1324*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW7_OP_EN_ADDR 0x1d58 1325*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW8_OP_EN_ADDR 0x1d58 1326*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW9_OP_EN_ADDR 0x1d58 1327*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW10_OP_EN_ADDR 0x1d58 1328*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW11_OP_EN_ADDR 0x1d58 1329*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW12_OP_EN_ADDR 0x1d58 1330*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW13_OP_EN_ADDR 0x1d58 1331*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW14_OP_EN_ADDR 0x1d58 1332*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_SW_OP_EN_ADDR 0x1d58 1333*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW0_OP_CFG_ADDR 0x1d5e 1334*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW1_OP_CFG_ADDR 0x1d5e 1335*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW2_OP_CFG_ADDR 0x1d5e 1336*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW3_OP_CFG_ADDR 0x1d5e 1337*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW4_OP_CFG_ADDR 0x1d5e 1338*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW5_OP_CFG_ADDR 0x1d5e 1339*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW6_OP_CFG_ADDR 0x1d5e 1340*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW7_OP_CFG_ADDR 0x1d5e 1341*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW8_OP_CFG_ADDR 0x1d5e 1342*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW9_OP_CFG_ADDR 0x1d5e 1343*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW10_OP_CFG_ADDR 0x1d5e 1344*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW11_OP_CFG_ADDR 0x1d5e 1345*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW12_OP_CFG_ADDR 0x1d5e 1346*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW13_OP_CFG_ADDR 0x1d5e 1347*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_HW14_OP_CFG_ADDR 0x1d5e 1348*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIBR_SW_OP_CFG_ADDR 0x1d5e 1349*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_OP_MODE_ADDR 0x1d66 1350*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_OP_MODE_SHIFT 10 1351*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW0_OP_EN_ADDR 0x1d6a 1352*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW1_OP_EN_ADDR 0x1d6a 1353*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW2_OP_EN_ADDR 0x1d6a 1354*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW3_OP_EN_ADDR 0x1d6a 1355*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW4_OP_EN_ADDR 0x1d6a 1356*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW5_OP_EN_ADDR 0x1d6a 1357*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW6_OP_EN_ADDR 0x1d6a 1358*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW7_OP_EN_ADDR 0x1d6a 1359*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW8_OP_EN_ADDR 0x1d6a 1360*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW9_OP_EN_ADDR 0x1d6a 1361*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW10_OP_EN_ADDR 0x1d6a 1362*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW11_OP_EN_ADDR 0x1d6a 1363*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW12_OP_EN_ADDR 0x1d6a 1364*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW13_OP_EN_ADDR 0x1d6a 1365*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW14_OP_EN_ADDR 0x1d6a 1366*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_SW_OP_EN_ADDR 0x1d6a 1367*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW0_OP_CFG_ADDR 0x1d70 1368*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW1_OP_CFG_ADDR 0x1d70 1369*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW2_OP_CFG_ADDR 0x1d70 1370*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW3_OP_CFG_ADDR 0x1d70 1371*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW4_OP_CFG_ADDR 0x1d70 1372*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW5_OP_CFG_ADDR 0x1d70 1373*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW6_OP_CFG_ADDR 0x1d70 1374*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW7_OP_CFG_ADDR 0x1d70 1375*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW8_OP_CFG_ADDR 0x1d70 1376*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW9_OP_CFG_ADDR 0x1d70 1377*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW10_OP_CFG_ADDR 0x1d70 1378*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW11_OP_CFG_ADDR 0x1d70 1379*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW12_OP_CFG_ADDR 0x1d70 1380*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW13_OP_CFG_ADDR 0x1d70 1381*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_HW14_OP_CFG_ADDR 0x1d70 1382*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VIO28_SW_OP_CFG_ADDR 0x1d70 1383*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_OP_MODE_ADDR 0x1d8a 1384*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_OP_MODE_SHIFT 10 1385*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW0_OP_EN_ADDR 0x1d8e 1386*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW1_OP_EN_ADDR 0x1d8e 1387*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW2_OP_EN_ADDR 0x1d8e 1388*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW3_OP_EN_ADDR 0x1d8e 1389*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW4_OP_EN_ADDR 0x1d8e 1390*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW5_OP_EN_ADDR 0x1d8e 1391*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW6_OP_EN_ADDR 0x1d8e 1392*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW7_OP_EN_ADDR 0x1d8e 1393*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW8_OP_EN_ADDR 0x1d8e 1394*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW9_OP_EN_ADDR 0x1d8e 1395*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW10_OP_EN_ADDR 0x1d8e 1396*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW11_OP_EN_ADDR 0x1d8e 1397*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW12_OP_EN_ADDR 0x1d8e 1398*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW13_OP_EN_ADDR 0x1d8e 1399*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW14_OP_EN_ADDR 0x1d8e 1400*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_SW_OP_EN_ADDR 0x1d8e 1401*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW0_OP_CFG_ADDR 0x1d94 1402*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW1_OP_CFG_ADDR 0x1d94 1403*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW2_OP_CFG_ADDR 0x1d94 1404*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW3_OP_CFG_ADDR 0x1d94 1405*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW4_OP_CFG_ADDR 0x1d94 1406*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW5_OP_CFG_ADDR 0x1d94 1407*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW6_OP_CFG_ADDR 0x1d94 1408*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW7_OP_CFG_ADDR 0x1d94 1409*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW8_OP_CFG_ADDR 0x1d94 1410*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW9_OP_CFG_ADDR 0x1d94 1411*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW10_OP_CFG_ADDR 0x1d94 1412*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW11_OP_CFG_ADDR 0x1d94 1413*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW12_OP_CFG_ADDR 0x1d94 1414*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW13_OP_CFG_ADDR 0x1d94 1415*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_HW14_OP_CFG_ADDR 0x1d94 1416*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VM18_SW_OP_CFG_ADDR 0x1d94 1417*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_OP_MODE_ADDR 0x1d9c 1418*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_OP_MODE_SHIFT 10 1419*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW0_OP_EN_ADDR 0x1da0 1420*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW1_OP_EN_ADDR 0x1da0 1421*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW2_OP_EN_ADDR 0x1da0 1422*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW3_OP_EN_ADDR 0x1da0 1423*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW4_OP_EN_ADDR 0x1da0 1424*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW5_OP_EN_ADDR 0x1da0 1425*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW6_OP_EN_ADDR 0x1da0 1426*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW7_OP_EN_ADDR 0x1da0 1427*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW8_OP_EN_ADDR 0x1da0 1428*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW9_OP_EN_ADDR 0x1da0 1429*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW10_OP_EN_ADDR 0x1da0 1430*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW11_OP_EN_ADDR 0x1da0 1431*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW12_OP_EN_ADDR 0x1da0 1432*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW13_OP_EN_ADDR 0x1da0 1433*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW14_OP_EN_ADDR 0x1da0 1434*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_SW_OP_EN_ADDR 0x1da0 1435*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW0_OP_CFG_ADDR 0x1da6 1436*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW1_OP_CFG_ADDR 0x1da6 1437*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW2_OP_CFG_ADDR 0x1da6 1438*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW3_OP_CFG_ADDR 0x1da6 1439*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW4_OP_CFG_ADDR 0x1da6 1440*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW5_OP_CFG_ADDR 0x1da6 1441*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW6_OP_CFG_ADDR 0x1da6 1442*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW7_OP_CFG_ADDR 0x1da6 1443*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW8_OP_CFG_ADDR 0x1da6 1444*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW9_OP_CFG_ADDR 0x1da6 1445*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW10_OP_CFG_ADDR 0x1da6 1446*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW11_OP_CFG_ADDR 0x1da6 1447*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW12_OP_CFG_ADDR 0x1da6 1448*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW13_OP_CFG_ADDR 0x1da6 1449*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_HW14_OP_CFG_ADDR 0x1da6 1450*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VUFS_SW_OP_CFG_ADDR 0x1da6 1451*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_OP_MODE_ADDR 0x1e8a 1452*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_OP_MODE_SHIFT 10 1453*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_VOSEL_SLEEP_ADDR 0x1e8e 1454*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW0_OP_EN_ADDR 0x1e96 1455*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW1_OP_EN_ADDR 0x1e96 1456*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW2_OP_EN_ADDR 0x1e96 1457*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW3_OP_EN_ADDR 0x1e96 1458*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW4_OP_EN_ADDR 0x1e96 1459*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW5_OP_EN_ADDR 0x1e96 1460*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW6_OP_EN_ADDR 0x1e96 1461*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW7_OP_EN_ADDR 0x1e96 1462*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW8_OP_EN_ADDR 0x1e96 1463*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW9_OP_EN_ADDR 0x1e96 1464*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW10_OP_EN_ADDR 0x1e96 1465*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW11_OP_EN_ADDR 0x1e96 1466*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW12_OP_EN_ADDR 0x1e96 1467*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW13_OP_EN_ADDR 0x1e96 1468*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW14_OP_EN_ADDR 0x1e96 1469*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_SW_OP_EN_ADDR 0x1e96 1470*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW0_OP_CFG_ADDR 0x1e9c 1471*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW1_OP_CFG_ADDR 0x1e9c 1472*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW2_OP_CFG_ADDR 0x1e9c 1473*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW3_OP_CFG_ADDR 0x1e9c 1474*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW4_OP_CFG_ADDR 0x1e9c 1475*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW5_OP_CFG_ADDR 0x1e9c 1476*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW6_OP_CFG_ADDR 0x1e9c 1477*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW7_OP_CFG_ADDR 0x1e9c 1478*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW8_OP_CFG_ADDR 0x1e9c 1479*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW9_OP_CFG_ADDR 0x1e9c 1480*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW10_OP_CFG_ADDR 0x1e9c 1481*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW11_OP_CFG_ADDR 0x1e9c 1482*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW12_OP_CFG_ADDR 0x1e9c 1483*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW13_OP_CFG_ADDR 0x1e9c 1484*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_HW14_OP_CFG_ADDR 0x1e9c 1485*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC1_SW_OP_CFG_ADDR 0x1e9c 1486*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_OP_MODE_ADDR 0x1eaa 1487*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_OP_MODE_SHIFT 10 1488*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_VOSEL_SLEEP_ADDR 0x1eae 1489*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW0_OP_EN_ADDR 0x1eb6 1490*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW1_OP_EN_ADDR 0x1eb6 1491*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW2_OP_EN_ADDR 0x1eb6 1492*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW3_OP_EN_ADDR 0x1eb6 1493*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW4_OP_EN_ADDR 0x1eb6 1494*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW5_OP_EN_ADDR 0x1eb6 1495*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW6_OP_EN_ADDR 0x1eb6 1496*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW7_OP_EN_ADDR 0x1eb6 1497*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW8_OP_EN_ADDR 0x1eb6 1498*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW9_OP_EN_ADDR 0x1eb6 1499*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW10_OP_EN_ADDR 0x1eb6 1500*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW11_OP_EN_ADDR 0x1eb6 1501*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW12_OP_EN_ADDR 0x1eb6 1502*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW13_OP_EN_ADDR 0x1eb6 1503*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW14_OP_EN_ADDR 0x1eb6 1504*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_SW_OP_EN_ADDR 0x1eb6 1505*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW0_OP_CFG_ADDR 0x1ebc 1506*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW1_OP_CFG_ADDR 0x1ebc 1507*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW2_OP_CFG_ADDR 0x1ebc 1508*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW3_OP_CFG_ADDR 0x1ebc 1509*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW4_OP_CFG_ADDR 0x1ebc 1510*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW5_OP_CFG_ADDR 0x1ebc 1511*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW6_OP_CFG_ADDR 0x1ebc 1512*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW7_OP_CFG_ADDR 0x1ebc 1513*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW8_OP_CFG_ADDR 0x1ebc 1514*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW9_OP_CFG_ADDR 0x1ebc 1515*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW10_OP_CFG_ADDR 0x1ebc 1516*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW11_OP_CFG_ADDR 0x1ebc 1517*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW12_OP_CFG_ADDR 0x1ebc 1518*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW13_OP_CFG_ADDR 0x1ebc 1519*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_HW14_OP_CFG_ADDR 0x1ebc 1520*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_PROC2_SW_OP_CFG_ADDR 0x1ebc 1521*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_OP_MODE_ADDR 0x1f0a 1522*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_OP_MODE_SHIFT 10 1523*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_VOSEL_SLEEP_ADDR 0x1f0e 1524*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW0_OP_EN_ADDR 0x1f16 1525*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW1_OP_EN_ADDR 0x1f16 1526*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW2_OP_EN_ADDR 0x1f16 1527*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW3_OP_EN_ADDR 0x1f16 1528*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW4_OP_EN_ADDR 0x1f16 1529*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW5_OP_EN_ADDR 0x1f16 1530*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW6_OP_EN_ADDR 0x1f16 1531*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW7_OP_EN_ADDR 0x1f16 1532*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW8_OP_EN_ADDR 0x1f16 1533*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW9_OP_EN_ADDR 0x1f16 1534*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW10_OP_EN_ADDR 0x1f16 1535*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW11_OP_EN_ADDR 0x1f16 1536*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW12_OP_EN_ADDR 0x1f16 1537*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW13_OP_EN_ADDR 0x1f16 1538*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW14_OP_EN_ADDR 0x1f16 1539*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_SW_OP_EN_ADDR 0x1f16 1540*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW0_OP_CFG_ADDR 0x1f1c 1541*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW1_OP_CFG_ADDR 0x1f1c 1542*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW2_OP_CFG_ADDR 0x1f1c 1543*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW3_OP_CFG_ADDR 0x1f1c 1544*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW4_OP_CFG_ADDR 0x1f1c 1545*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW5_OP_CFG_ADDR 0x1f1c 1546*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW6_OP_CFG_ADDR 0x1f1c 1547*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW7_OP_CFG_ADDR 0x1f1c 1548*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW8_OP_CFG_ADDR 0x1f1c 1549*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW9_OP_CFG_ADDR 0x1f1c 1550*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW10_OP_CFG_ADDR 0x1f1c 1551*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW11_OP_CFG_ADDR 0x1f1c 1552*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW12_OP_CFG_ADDR 0x1f1c 1553*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW13_OP_CFG_ADDR 0x1f1c 1554*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_HW14_OP_CFG_ADDR 0x1f1c 1555*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_SW_OP_CFG_ADDR 0x1f1c 1556*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP_ADDR 0x1f28 1557*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_OP_MODE_ADDR 0x1f30 1558*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_OP_MODE_SHIFT 10 1559*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_VOSEL_SLEEP_ADDR 0x1f34 1560*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW0_OP_EN_ADDR 0x1f3c 1561*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW1_OP_EN_ADDR 0x1f3c 1562*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW2_OP_EN_ADDR 0x1f3c 1563*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW3_OP_EN_ADDR 0x1f3c 1564*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW4_OP_EN_ADDR 0x1f3c 1565*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW5_OP_EN_ADDR 0x1f3c 1566*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW6_OP_EN_ADDR 0x1f3c 1567*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW7_OP_EN_ADDR 0x1f3c 1568*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW8_OP_EN_ADDR 0x1f3c 1569*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW9_OP_EN_ADDR 0x1f3c 1570*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW10_OP_EN_ADDR 0x1f3c 1571*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW11_OP_EN_ADDR 0x1f3c 1572*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW12_OP_EN_ADDR 0x1f3c 1573*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW13_OP_EN_ADDR 0x1f3c 1574*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW14_OP_EN_ADDR 0x1f3c 1575*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_SW_OP_EN_ADDR 0x1f3c 1576*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW0_OP_CFG_ADDR 0x1f42 1577*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW1_OP_CFG_ADDR 0x1f42 1578*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW2_OP_CFG_ADDR 0x1f42 1579*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW3_OP_CFG_ADDR 0x1f42 1580*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW4_OP_CFG_ADDR 0x1f42 1581*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW5_OP_CFG_ADDR 0x1f42 1582*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW6_OP_CFG_ADDR 0x1f42 1583*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW7_OP_CFG_ADDR 0x1f42 1584*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW8_OP_CFG_ADDR 0x1f42 1585*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW9_OP_CFG_ADDR 0x1f42 1586*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW10_OP_CFG_ADDR 0x1f42 1587*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW11_OP_CFG_ADDR 0x1f42 1588*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW12_OP_CFG_ADDR 0x1f42 1589*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW13_OP_CFG_ADDR 0x1f42 1590*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_HW14_OP_CFG_ADDR 0x1f42 1591*868b2d60SZhigang Qin #define MT6359P_RG_LDO_VSRAM_MD_SW_OP_CFG_ADDR 0x1f42 1592*868b2d60SZhigang Qin 1593*868b2d60SZhigang Qin #endif /* MT6359P_LOWPOWER_REG_H */ 1594