1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6 #ifndef MT6319_LOWPOWER_REG_H 7 #define MT6319_LOWPOWER_REG_H 8 9 #define MT6319_RG_LDO_VDIG18_SW_OP_EN_ADDR 0x0196 10 #define MT6319_RG_LDO_VDIG18_HW_OP_EN_ADDR 0x0196 11 #define MT6319_RG_VDIG18_PWROFF_OP_EN_ADDR 0x0197 12 #define MT6319_RG_BUCK_VBUCK1_HW0_OP_EN_ADDR 0x148d 13 #define MT6319_RG_BUCK_VBUCK1_HW1_OP_EN_ADDR 0x148d 14 #define MT6319_RG_BUCK_VBUCK1_HW2_OP_EN_ADDR 0x148d 15 #define MT6319_RG_BUCK_VBUCK1_HW3_OP_EN_ADDR 0x148d 16 #define MT6319_RG_BUCK_VBUCK1_HW4_OP_EN_ADDR 0x148d 17 #define MT6319_RG_BUCK_VBUCK1_HW5_OP_EN_ADDR 0x148d 18 #define MT6319_RG_BUCK_VBUCK1_HW6_OP_EN_ADDR 0x148d 19 #define MT6319_RG_BUCK_VBUCK1_HW7_OP_EN_ADDR 0x148d 20 #define MT6319_RG_BUCK_VBUCK1_HW8_OP_EN_ADDR 0x1708 21 #define MT6319_RG_BUCK_VBUCK1_HW9_OP_EN_ADDR 0x1708 22 #define MT6319_RG_BUCK_VBUCK1_HW10_OP_EN_ADDR 0x1708 23 #define MT6319_RG_BUCK_VBUCK1_HW11_OP_EN_ADDR 0x1708 24 #define MT6319_RG_BUCK_VBUCK1_HW12_OP_EN_ADDR 0x1708 25 #define MT6319_RG_BUCK_VBUCK1_HW13_OP_EN_ADDR 0x1708 26 #define MT6319_RG_BUCK_VBUCK1_SW_OP_EN_ADDR 0x1490 27 #define MT6319_RG_BUCK_VBUCK1_HW0_OP_CFG_ADDR 0x1493 28 #define MT6319_RG_BUCK_VBUCK1_HW1_OP_CFG_ADDR 0x1493 29 #define MT6319_RG_BUCK_VBUCK1_HW2_OP_CFG_ADDR 0x1493 30 #define MT6319_RG_BUCK_VBUCK1_HW3_OP_CFG_ADDR 0x1493 31 #define MT6319_RG_BUCK_VBUCK1_HW4_OP_CFG_ADDR 0x1493 32 #define MT6319_RG_BUCK_VBUCK1_HW5_OP_CFG_ADDR 0x1493 33 #define MT6319_RG_BUCK_VBUCK1_HW6_OP_CFG_ADDR 0x1493 34 #define MT6319_RG_BUCK_VBUCK1_HW7_OP_CFG_ADDR 0x1493 35 #define MT6319_RG_BUCK_VBUCK1_HW8_OP_CFG_ADDR 0x170b 36 #define MT6319_RG_BUCK_VBUCK1_HW9_OP_CFG_ADDR 0x170b 37 #define MT6319_RG_BUCK_VBUCK1_HW10_OP_CFG_ADDR 0x170b 38 #define MT6319_RG_BUCK_VBUCK1_HW11_OP_CFG_ADDR 0x170b 39 #define MT6319_RG_BUCK_VBUCK1_HW12_OP_CFG_ADDR 0x170b 40 #define MT6319_RG_BUCK_VBUCK1_HW13_OP_CFG_ADDR 0x170b 41 #define MT6319_RG_BUCK_VBUCK1_HW0_OP_MODE_ADDR 0x1496 42 #define MT6319_RG_BUCK_VBUCK1_HW1_OP_MODE_ADDR 0x1496 43 #define MT6319_RG_BUCK_VBUCK1_HW2_OP_MODE_ADDR 0x1496 44 #define MT6319_RG_BUCK_VBUCK1_HW3_OP_MODE_ADDR 0x1496 45 #define MT6319_RG_BUCK_VBUCK1_HW4_OP_MODE_ADDR 0x1496 46 #define MT6319_RG_BUCK_VBUCK1_HW5_OP_MODE_ADDR 0x1496 47 #define MT6319_RG_BUCK_VBUCK1_HW6_OP_MODE_ADDR 0x1496 48 #define MT6319_RG_BUCK_VBUCK1_HW7_OP_MODE_ADDR 0x1496 49 #define MT6319_RG_BUCK_VBUCK1_HW8_OP_MODE_ADDR 0x170e 50 #define MT6319_RG_BUCK_VBUCK1_HW9_OP_MODE_ADDR 0x170e 51 #define MT6319_RG_BUCK_VBUCK1_HW10_OP_MODE_ADDR 0x170e 52 #define MT6319_RG_BUCK_VBUCK1_HW11_OP_MODE_ADDR 0x170e 53 #define MT6319_RG_BUCK_VBUCK1_HW12_OP_MODE_ADDR 0x170e 54 #define MT6319_RG_BUCK_VBUCK1_HW13_OP_MODE_ADDR 0x170e 55 #define MT6319_RG_BUCK_VBUCK2_HW0_OP_EN_ADDR 0x150d 56 #define MT6319_RG_BUCK_VBUCK2_HW1_OP_EN_ADDR 0x150d 57 #define MT6319_RG_BUCK_VBUCK2_HW2_OP_EN_ADDR 0x150d 58 #define MT6319_RG_BUCK_VBUCK2_HW3_OP_EN_ADDR 0x150d 59 #define MT6319_RG_BUCK_VBUCK2_HW4_OP_EN_ADDR 0x150d 60 #define MT6319_RG_BUCK_VBUCK2_HW5_OP_EN_ADDR 0x150d 61 #define MT6319_RG_BUCK_VBUCK2_HW6_OP_EN_ADDR 0x150d 62 #define MT6319_RG_BUCK_VBUCK2_HW7_OP_EN_ADDR 0x150d 63 #define MT6319_RG_BUCK_VBUCK2_HW8_OP_EN_ADDR 0x1711 64 #define MT6319_RG_BUCK_VBUCK2_HW9_OP_EN_ADDR 0x1711 65 #define MT6319_RG_BUCK_VBUCK2_HW10_OP_EN_ADDR 0x1711 66 #define MT6319_RG_BUCK_VBUCK2_HW11_OP_EN_ADDR 0x1711 67 #define MT6319_RG_BUCK_VBUCK2_HW12_OP_EN_ADDR 0x1711 68 #define MT6319_RG_BUCK_VBUCK2_HW13_OP_EN_ADDR 0x1711 69 #define MT6319_RG_BUCK_VBUCK2_SW_OP_EN_ADDR 0x1510 70 #define MT6319_RG_BUCK_VBUCK2_HW0_OP_CFG_ADDR 0x1513 71 #define MT6319_RG_BUCK_VBUCK2_HW1_OP_CFG_ADDR 0x1513 72 #define MT6319_RG_BUCK_VBUCK2_HW2_OP_CFG_ADDR 0x1513 73 #define MT6319_RG_BUCK_VBUCK2_HW3_OP_CFG_ADDR 0x1513 74 #define MT6319_RG_BUCK_VBUCK2_HW4_OP_CFG_ADDR 0x1513 75 #define MT6319_RG_BUCK_VBUCK2_HW5_OP_CFG_ADDR 0x1513 76 #define MT6319_RG_BUCK_VBUCK2_HW6_OP_CFG_ADDR 0x1513 77 #define MT6319_RG_BUCK_VBUCK2_HW7_OP_CFG_ADDR 0x1513 78 #define MT6319_RG_BUCK_VBUCK2_HW8_OP_CFG_ADDR 0x1714 79 #define MT6319_RG_BUCK_VBUCK2_HW9_OP_CFG_ADDR 0x1714 80 #define MT6319_RG_BUCK_VBUCK2_HW10_OP_CFG_ADDR 0x1714 81 #define MT6319_RG_BUCK_VBUCK2_HW11_OP_CFG_ADDR 0x1714 82 #define MT6319_RG_BUCK_VBUCK2_HW12_OP_CFG_ADDR 0x1714 83 #define MT6319_RG_BUCK_VBUCK2_HW13_OP_CFG_ADDR 0x1714 84 #define MT6319_RG_BUCK_VBUCK2_HW0_OP_MODE_ADDR 0x1516 85 #define MT6319_RG_BUCK_VBUCK2_HW1_OP_MODE_ADDR 0x1516 86 #define MT6319_RG_BUCK_VBUCK2_HW2_OP_MODE_ADDR 0x1516 87 #define MT6319_RG_BUCK_VBUCK2_HW3_OP_MODE_ADDR 0x1516 88 #define MT6319_RG_BUCK_VBUCK2_HW4_OP_MODE_ADDR 0x1516 89 #define MT6319_RG_BUCK_VBUCK2_HW5_OP_MODE_ADDR 0x1516 90 #define MT6319_RG_BUCK_VBUCK2_HW6_OP_MODE_ADDR 0x1516 91 #define MT6319_RG_BUCK_VBUCK2_HW7_OP_MODE_ADDR 0x1516 92 #define MT6319_RG_BUCK_VBUCK2_HW8_OP_MODE_ADD 0x1717 93 #define MT6319_RG_BUCK_VBUCK2_HW9_OP_MODE_ADDR 0x1717 94 #define MT6319_RG_BUCK_VBUCK2_HW10_OP_MODE_ADDR 0x1717 95 #define MT6319_RG_BUCK_VBUCK2_HW11_OP_MODE_ADDR 0x1717 96 #define MT6319_RG_BUCK_VBUCK2_HW12_OP_MODE_ADDR 0x1717 97 #define MT6319_RG_BUCK_VBUCK2_HW13_OP_MODE_ADDR 0x1717 98 #define MT6319_RG_BUCK_VBUCK3_HW0_OP_EN_ADDR 0x158d 99 #define MT6319_RG_BUCK_VBUCK3_HW1_OP_EN_ADDR 0x158d 100 #define MT6319_RG_BUCK_VBUCK3_HW2_OP_EN_ADDR 0x158d 101 #define MT6319_RG_BUCK_VBUCK3_HW3_OP_EN_ADDR 0x158d 102 #define MT6319_RG_BUCK_VBUCK3_HW4_OP_EN_ADDR 0x158d 103 #define MT6319_RG_BUCK_VBUCK3_HW5_OP_EN_ADDR 0x158d 104 #define MT6319_RG_BUCK_VBUCK3_HW6_OP_EN_ADDR 0x158d 105 #define MT6319_RG_BUCK_VBUCK3_HW7_OP_EN_ADDR 0x158d 106 #define MT6319_RG_BUCK_VBUCK3_HW8_OP_EN_ADDR 0x171a 107 #define MT6319_RG_BUCK_VBUCK3_HW9_OP_EN_ADDR 0x171a 108 #define MT6319_RG_BUCK_VBUCK3_HW10_OP_EN_ADDR 0x171a 109 #define MT6319_RG_BUCK_VBUCK3_HW11_OP_EN_ADDR 0x171a 110 #define MT6319_RG_BUCK_VBUCK3_HW12_OP_EN_ADDR 0x171a 111 #define MT6319_RG_BUCK_VBUCK3_HW13_OP_EN_ADDR 0x171a 112 #define MT6319_RG_BUCK_VBUCK3_SW_OP_EN_ADDR 0x1590 113 #define MT6319_RG_BUCK_VBUCK3_HW0_OP_CFG_ADDR 0x1593 114 #define MT6319_RG_BUCK_VBUCK3_HW1_OP_CFG_ADDR 0x1593 115 #define MT6319_RG_BUCK_VBUCK3_HW2_OP_CFG_ADDR 0x1593 116 #define MT6319_RG_BUCK_VBUCK3_HW3_OP_CFG_ADDR 0x1593 117 #define MT6319_RG_BUCK_VBUCK3_HW4_OP_CFG_ADDR 0x1593 118 #define MT6319_RG_BUCK_VBUCK3_HW5_OP_CFG_ADDR 0x1593 119 #define MT6319_RG_BUCK_VBUCK3_HW6_OP_CFG_ADDR 0x1593 120 #define MT6319_RG_BUCK_VBUCK3_HW7_OP_CFG_ADDR 0x1593 121 #define MT6319_RG_BUCK_VBUCK3_HW8_OP_CFG_ADDR 0x171d 122 #define MT6319_RG_BUCK_VBUCK3_HW9_OP_CFG_ADDR 0x171d 123 #define MT6319_RG_BUCK_VBUCK3_HW10_OP_CFG_ADDR 0x171d 124 #define MT6319_RG_BUCK_VBUCK3_HW11_OP_CFG_ADDR 0x171d 125 #define MT6319_RG_BUCK_VBUCK3_HW12_OP_CFG_ADDR 0x171d 126 #define MT6319_RG_BUCK_VBUCK3_HW13_OP_CFG_ADDR 0x171d 127 #define MT6319_RG_BUCK_VBUCK3_HW0_OP_MODE_ADDR 0x1596 128 #define MT6319_RG_BUCK_VBUCK3_HW1_OP_MODE_ADDR 0x1596 129 #define MT6319_RG_BUCK_VBUCK3_HW2_OP_MODE_ADDR 0x1596 130 #define MT6319_RG_BUCK_VBUCK3_HW3_OP_MODE_ADDR 0x1596 131 #define MT6319_RG_BUCK_VBUCK3_HW4_OP_MODE_ADDR 0x1596 132 #define MT6319_RG_BUCK_VBUCK3_HW5_OP_MODE_ADDR 0x1596 133 #define MT6319_RG_BUCK_VBUCK3_HW6_OP_MODE_ADDR 0x1596 134 #define MT6319_RG_BUCK_VBUCK3_HW7_OP_MODE_ADDR 0x1596 135 #define MT6319_RG_BUCK_VBUCK3_HW8_OP_MODE_ADDR 0x1720 136 #define MT6319_RG_BUCK_VBUCK3_HW9_OP_MODE_ADDR 0x1720 137 #define MT6319_RG_BUCK_VBUCK3_HW10_OP_MODE_ADDR 0x1720 138 #define MT6319_RG_BUCK_VBUCK3_HW11_OP_MODE_ADDR 0x1720 139 #define MT6319_RG_BUCK_VBUCK3_HW12_OP_MODE_ADDR 0x1720 140 #define MT6319_RG_BUCK_VBUCK3_HW13_OP_MODE_ADDR 0x1720 141 #define MT6319_RG_BUCK_VBUCK4_HW0_OP_EN_ADDR 0x160d 142 #define MT6319_RG_BUCK_VBUCK4_HW1_OP_EN_ADDR 0x160d 143 #define MT6319_RG_BUCK_VBUCK4_HW2_OP_EN_ADDR 0x160d 144 #define MT6319_RG_BUCK_VBUCK4_HW3_OP_EN_ADDR 0x160d 145 #define MT6319_RG_BUCK_VBUCK4_HW4_OP_EN_ADDR 0x160d 146 #define MT6319_RG_BUCK_VBUCK4_HW5_OP_EN_ADDR 0x160d 147 #define MT6319_RG_BUCK_VBUCK4_HW6_OP_EN_ADDR 0x160d 148 #define MT6319_RG_BUCK_VBUCK4_HW7_OP_EN_ADDR 0x160d 149 #define MT6319_RG_BUCK_VBUCK4_HW8_OP_EN_ADDR 0x1723 150 #define MT6319_RG_BUCK_VBUCK4_HW9_OP_EN_ADDR 0x1723 151 #define MT6319_RG_BUCK_VBUCK4_HW10_OP_EN_ADDR 0x1723 152 #define MT6319_RG_BUCK_VBUCK4_HW11_OP_EN_ADDR 0x1723 153 #define MT6319_RG_BUCK_VBUCK4_HW12_OP_EN_ADDR 0x1723 154 #define MT6319_RG_BUCK_VBUCK4_HW13_OP_EN_ADDR 0x1723 155 #define MT6319_RG_BUCK_VBUCK4_SW_OP_EN_ADDR 0x1610 156 #define MT6319_RG_BUCK_VBUCK4_HW0_OP_CFG_ADDR 0x1613 157 #define MT6319_RG_BUCK_VBUCK4_HW1_OP_CFG_ADDR 0x1613 158 #define MT6319_RG_BUCK_VBUCK4_HW2_OP_CFG_ADDR 0x1613 159 #define MT6319_RG_BUCK_VBUCK4_HW3_OP_CFG_ADDR 0x1613 160 #define MT6319_RG_BUCK_VBUCK4_HW4_OP_CFG_ADDR 0x1613 161 #define MT6319_RG_BUCK_VBUCK4_HW5_OP_CFG_ADDR 0x1613 162 #define MT6319_RG_BUCK_VBUCK4_HW6_OP_CFG_ADDR 0x1613 163 #define MT6319_RG_BUCK_VBUCK4_HW7_OP_CFG_ADDR 0x1613 164 #define MT6319_RG_BUCK_VBUCK4_HW8_OP_CFG_ADDR 0x1726 165 #define MT6319_RG_BUCK_VBUCK4_HW9_OP_CFG_ADDR 0x1726 166 #define MT6319_RG_BUCK_VBUCK4_HW10_OP_CFG_ADDR 0x1726 167 #define MT6319_RG_BUCK_VBUCK4_HW11_OP_CFG_ADDR 0x1726 168 #define MT6319_RG_BUCK_VBUCK4_HW12_OP_CFG_ADDR 0x1726 169 #define MT6319_RG_BUCK_VBUCK4_HW13_OP_CFG_ADDR 0x1726 170 #define MT6319_RG_BUCK_VBUCK4_HW0_OP_MODE_ADDR 0x1616 171 #define MT6319_RG_BUCK_VBUCK4_HW1_OP_MODE_ADDR 0x1616 172 #define MT6319_RG_BUCK_VBUCK4_HW2_OP_MODE_ADDR 0x1616 173 #define MT6319_RG_BUCK_VBUCK4_HW3_OP_MODE_ADDR 0x1616 174 #define MT6319_RG_BUCK_VBUCK4_HW4_OP_MODE_ADDR 0x1616 175 #define MT6319_RG_BUCK_VBUCK4_HW5_OP_MODE_ADDR 0x1616 176 #define MT6319_RG_BUCK_VBUCK4_HW6_OP_MODE_ADDR 0x1616 177 #define MT6319_RG_BUCK_VBUCK4_HW7_OP_MODE_ADDR 0x1616 178 #define MT6319_RG_BUCK_VBUCK4_HW8_OP_MODE_ADDR 0x1729 179 #define MT6319_RG_BUCK_VBUCK4_HW9_OP_MODE_ADDR 0x1729 180 #define MT6319_RG_BUCK_VBUCK4_HW10_OP_MODE_ADDR 0x1729 181 #define MT6319_RG_BUCK_VBUCK4_HW11_OP_MODE_ADDR 0x1729 182 #define MT6319_RG_BUCK_VBUCK4_HW12_OP_MODE_ADDR 0x1729 183 #define MT6319_RG_BUCK_VBUCK4_HW13_OP_MODE_ADDR 0x1729 184 185 #endif /* MT6319_LOWPOWER_REG_H */ 186