1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT6316_LOWPOWER_REG_H 8 #define MT6316_LOWPOWER_REG_H 9 10 #define MT6316_RG_LDO_VDIG18_SW_OP_EN_ADDR 0x197 11 #define MT6316_RG_LDO_VDIG18_HW0_OP_EN_ADDR 0x197 12 #define MT6316_RG_LDO_VDIG18_HW2_OP_EN_ADDR 0x197 13 #define MT6316_RG_LDO_VDIG18_RC0_OP_EN_ADDR 0x197 14 #define MT6316_RG_LDO_VDIG18_BUCK_OP_EN_ADDR 0x197 15 #define MT6316_RG_LDO_VDIG18_HW0_OP_MODE_ADDR 0x198 16 #define MT6316_RG_LDO_VDIG18_HW2_OP_MODE_ADDR 0x198 17 #define MT6316_RG_LDO_VDIG18_RC0_OP_MODE_ADDR 0x198 18 #define MT6316_RG_LDO_VDIG18_BUCK_OP_MODE_ADDR 0x198 19 #define MT6316_RG_VDIG18_PWROFF_OP_EN_ADDR 0x199 20 #define MT6316_RG_LDO_VDIG12_SW_OP_EN_ADDR 0x19B 21 #define MT6316_RG_LDO_VDIG12_HW0_OP_EN_ADDR 0x19B 22 #define MT6316_RG_LDO_VDIG12_HW2_OP_EN_ADDR 0x19B 23 #define MT6316_RG_LDO_VDIG12_RC0_OP_EN_ADDR 0x19B 24 #define MT6316_RG_LDO_VDIG12_BUCK_OP_EN_ADDR 0x19B 25 #define MT6316_RG_LDO_VDIG12_HW0_OP_MODE_ADDR 0x19C 26 #define MT6316_RG_LDO_VDIG12_HW2_OP_MODE_ADDR 0x19C 27 #define MT6316_RG_LDO_VDIG12_RC0_OP_MODE_ADDR 0x19C 28 #define MT6316_RG_LDO_VDIG12_BUCK_OP_MODE_ADDR 0x19C 29 #define MT6316_RG_VDIG12_PWROFF_OP_EN_ADDR 0x19D 30 #define MT6316_RG_BUCK_VBUCK1_VOSEL_SLEEP_ADDR 0x148 31 #define MT6316_RG_BUCK_VBUCK1_ONLV_EN_ADDR 0x148 32 #define MT6316_RG_BUCK_VBUCK1_ONLV_EN_SHIFT 4 33 #define MT6316_RG_BUCK_VBUCK1_RC0_OP_EN_ADDR 0x149 34 #define MT6316_RG_BUCK_VBUCK1_RC1_OP_EN_ADDR 0x149 35 #define MT6316_RG_BUCK_VBUCK1_RC2_OP_EN_ADDR 0x149 36 #define MT6316_RG_BUCK_VBUCK1_RC3_OP_EN_ADDR 0x149 37 #define MT6316_RG_BUCK_VBUCK1_RC4_OP_EN_ADDR 0x149 38 #define MT6316_RG_BUCK_VBUCK1_RC5_OP_EN_ADDR 0x149 39 #define MT6316_RG_BUCK_VBUCK1_RC6_OP_EN_ADDR 0x149 40 #define MT6316_RG_BUCK_VBUCK1_RC7_OP_EN_ADDR 0x149 41 #define MT6316_RG_BUCK_VBUCK1_RC8_OP_EN_ADDR 0x149 42 #define MT6316_RG_BUCK_VBUCK1_RC9_OP_EN_ADDR 0x149 43 #define MT6316_RG_BUCK_VBUCK1_RC10_OP_EN_ADDR 0x149 44 #define MT6316_RG_BUCK_VBUCK1_RC11_OP_EN_ADDR 0x149 45 #define MT6316_RG_BUCK_VBUCK1_RC12_OP_EN_ADDR 0x149 46 #define MT6316_RG_BUCK_VBUCK1_RC13_OP_EN_ADDR 0x149 47 #define MT6316_RG_BUCK_VBUCK1_HW0_OP_EN_ADDR 0x149 48 #define MT6316_RG_BUCK_VBUCK1_HW1_OP_EN_ADDR 0x149 49 #define MT6316_RG_BUCK_VBUCK1_HW2_OP_EN_ADDR 0x149 50 #define MT6316_RG_BUCK_VBUCK1_HW3_OP_EN_ADDR 0x149 51 #define MT6316_RG_BUCK_VBUCK1_SW_OP_EN_ADDR 0x149 52 #define MT6316_RG_BUCK_VBUCK1_RC0_OP_CFG_ADDR 0x149 53 #define MT6316_RG_BUCK_VBUCK1_RC1_OP_CFG_ADDR 0x149 54 #define MT6316_RG_BUCK_VBUCK1_RC2_OP_CFG_ADDR 0x149 55 #define MT6316_RG_BUCK_VBUCK1_RC3_OP_CFG_ADDR 0x149 56 #define MT6316_RG_BUCK_VBUCK1_RC4_OP_CFG_ADDR 0x149 57 #define MT6316_RG_BUCK_VBUCK1_RC5_OP_CFG_ADDR 0x149 58 #define MT6316_RG_BUCK_VBUCK1_RC6_OP_CFG_ADDR 0x149 59 #define MT6316_RG_BUCK_VBUCK1_RC7_OP_CFG_ADDR 0x149 60 #define MT6316_RG_BUCK_VBUCK1_RC8_OP_CFG_ADDR 0x149 61 #define MT6316_RG_BUCK_VBUCK1_RC9_OP_CFG_ADDR 0x149 62 #define MT6316_RG_BUCK_VBUCK1_RC10_OP_CFG_ADDR 0x149 63 #define MT6316_RG_BUCK_VBUCK1_RC11_OP_CFG_ADDR 0x149 64 #define MT6316_RG_BUCK_VBUCK1_RC12_OP_CFG_ADDR 0x149 65 #define MT6316_RG_BUCK_VBUCK1_RC13_OP_CFG_ADDR 0x149 66 #define MT6316_RG_BUCK_VBUCK1_HW0_OP_CFG_ADDR 0x149 67 #define MT6316_RG_BUCK_VBUCK1_HW1_OP_CFG_ADDR 0x149 68 #define MT6316_RG_BUCK_VBUCK1_HW2_OP_CFG_ADDR 0x149 69 #define MT6316_RG_BUCK_VBUCK1_HW3_OP_CFG_ADDR 0x149 70 #define MT6316_RG_BUCK_VBUCK1_RC0_OP_MODE_ADDR 0x149 71 #define MT6316_RG_BUCK_VBUCK1_RC1_OP_MODE_ADDR 0x149 72 #define MT6316_RG_BUCK_VBUCK1_RC2_OP_MODE_ADDR 0x149 73 #define MT6316_RG_BUCK_VBUCK1_RC3_OP_MODE_ADDR 0x149 74 #define MT6316_RG_BUCK_VBUCK1_RC4_OP_MODE_ADDR 0x149 75 #define MT6316_RG_BUCK_VBUCK1_RC5_OP_MODE_ADDR 0x149 76 #define MT6316_RG_BUCK_VBUCK1_RC6_OP_MODE_ADDR 0x149 77 #define MT6316_RG_BUCK_VBUCK1_RC7_OP_MODE_ADDR 0x149 78 #define MT6316_RG_BUCK_VBUCK1_RC8_OP_MODE_ADDR 0x149 79 #define MT6316_RG_BUCK_VBUCK1_RC9_OP_MODE_ADDR 0x149 80 #define MT6316_RG_BUCK_VBUCK1_RC10_OP_MODE_ADDR 0x149 81 #define MT6316_RG_BUCK_VBUCK1_RC11_OP_MODE_ADDR 0x149 82 #define MT6316_RG_BUCK_VBUCK1_RC12_OP_MODE_ADDR 0x149 83 #define MT6316_RG_BUCK_VBUCK1_RC13_OP_MODE_ADDR 0x149 84 #define MT6316_RG_BUCK_VBUCK1_HW0_OP_MODE_ADDR 0x149 85 #define MT6316_RG_BUCK_VBUCK1_HW1_OP_MODE_ADDR 0x149 86 #define MT6316_RG_BUCK_VBUCK1_HW2_OP_MODE_ADDR 0x149 87 #define MT6316_RG_BUCK_VBUCK1_HW3_OP_MODE_ADDR 0x149 88 #define MT6316_RG_BUCK_VBUCK2_VOSEL_SLEEP_ADDR 0x150 89 #define MT6316_RG_BUCK_VBUCK2_ONLV_EN_ADDR 0x150 90 #define MT6316_RG_BUCK_VBUCK2_ONLV_EN_SHIFT 4 91 #define MT6316_RG_BUCK_VBUCK2_RC0_OP_EN_ADDR 0x151 92 #define MT6316_RG_BUCK_VBUCK2_RC1_OP_EN_ADDR 0x151 93 #define MT6316_RG_BUCK_VBUCK2_RC2_OP_EN_ADDR 0x151 94 #define MT6316_RG_BUCK_VBUCK2_RC3_OP_EN_ADDR 0x151 95 #define MT6316_RG_BUCK_VBUCK2_RC4_OP_EN_ADDR 0x151 96 #define MT6316_RG_BUCK_VBUCK2_RC5_OP_EN_ADDR 0x151 97 #define MT6316_RG_BUCK_VBUCK2_RC6_OP_EN_ADDR 0x151 98 #define MT6316_RG_BUCK_VBUCK2_RC7_OP_EN_ADDR 0x151 99 #define MT6316_RG_BUCK_VBUCK2_RC8_OP_EN_ADDR 0x151 100 #define MT6316_RG_BUCK_VBUCK2_RC9_OP_EN_ADDR 0x151 101 #define MT6316_RG_BUCK_VBUCK2_RC10_OP_EN_ADDR 0x151 102 #define MT6316_RG_BUCK_VBUCK2_RC11_OP_EN_ADDR 0x151 103 #define MT6316_RG_BUCK_VBUCK2_RC12_OP_EN_ADDR 0x151 104 #define MT6316_RG_BUCK_VBUCK2_RC13_OP_EN_ADDR 0x151 105 #define MT6316_RG_BUCK_VBUCK2_HW0_OP_EN_ADDR 0x151 106 #define MT6316_RG_BUCK_VBUCK2_HW1_OP_EN_ADDR 0x151 107 #define MT6316_RG_BUCK_VBUCK2_HW2_OP_EN_ADDR 0x151 108 #define MT6316_RG_BUCK_VBUCK2_HW3_OP_EN_ADDR 0x151 109 #define MT6316_RG_BUCK_VBUCK2_SW_OP_EN_ADDR 0x151 110 #define MT6316_RG_BUCK_VBUCK2_RC0_OP_CFG_ADDR 0x151 111 #define MT6316_RG_BUCK_VBUCK2_RC1_OP_CFG_ADDR 0x151 112 #define MT6316_RG_BUCK_VBUCK2_RC2_OP_CFG_ADDR 0x151 113 #define MT6316_RG_BUCK_VBUCK2_RC3_OP_CFG_ADDR 0x151 114 #define MT6316_RG_BUCK_VBUCK2_RC4_OP_CFG_ADDR 0x151 115 #define MT6316_RG_BUCK_VBUCK2_RC5_OP_CFG_ADDR 0x151 116 #define MT6316_RG_BUCK_VBUCK2_RC6_OP_CFG_ADDR 0x151 117 #define MT6316_RG_BUCK_VBUCK2_RC7_OP_CFG_ADDR 0x151 118 #define MT6316_RG_BUCK_VBUCK2_RC8_OP_CFG_ADDR 0x151 119 #define MT6316_RG_BUCK_VBUCK2_RC9_OP_CFG_ADDR 0x151 120 #define MT6316_RG_BUCK_VBUCK2_RC10_OP_CFG_ADDR 0x151 121 #define MT6316_RG_BUCK_VBUCK2_RC11_OP_CFG_ADDR 0x151 122 #define MT6316_RG_BUCK_VBUCK2_RC12_OP_CFG_ADDR 0x151 123 #define MT6316_RG_BUCK_VBUCK2_RC13_OP_CFG_ADDR 0x151 124 #define MT6316_RG_BUCK_VBUCK2_HW0_OP_CFG_ADDR 0x151 125 #define MT6316_RG_BUCK_VBUCK2_HW1_OP_CFG_ADDR 0x151 126 #define MT6316_RG_BUCK_VBUCK2_HW2_OP_CFG_ADDR 0x151 127 #define MT6316_RG_BUCK_VBUCK2_HW3_OP_CFG_ADDR 0x151 128 #define MT6316_RG_BUCK_VBUCK2_RC0_OP_MODE_ADDR 0x151 129 #define MT6316_RG_BUCK_VBUCK2_RC1_OP_MODE_ADDR 0x151 130 #define MT6316_RG_BUCK_VBUCK2_RC2_OP_MODE_ADDR 0x151 131 #define MT6316_RG_BUCK_VBUCK2_RC3_OP_MODE_ADDR 0x151 132 #define MT6316_RG_BUCK_VBUCK2_RC4_OP_MODE_ADDR 0x151 133 #define MT6316_RG_BUCK_VBUCK2_RC5_OP_MODE_ADDR 0x151 134 #define MT6316_RG_BUCK_VBUCK2_RC6_OP_MODE_ADDR 0x151 135 #define MT6316_RG_BUCK_VBUCK2_RC7_OP_MODE_ADDR 0x151 136 #define MT6316_RG_BUCK_VBUCK2_RC8_OP_MODE_ADDR 0x151 137 #define MT6316_RG_BUCK_VBUCK2_RC9_OP_MODE_ADDR 0x151 138 #define MT6316_RG_BUCK_VBUCK2_RC10_OP_MODE_ADDR 0x151 139 #define MT6316_RG_BUCK_VBUCK2_RC11_OP_MODE_ADDR 0x151 140 #define MT6316_RG_BUCK_VBUCK2_RC12_OP_MODE_ADDR 0x151 141 #define MT6316_RG_BUCK_VBUCK2_RC13_OP_MODE_ADDR 0x151 142 #define MT6316_RG_BUCK_VBUCK2_HW0_OP_MODE_ADDR 0x151 143 #define MT6316_RG_BUCK_VBUCK2_HW1_OP_MODE_ADDR 0x151 144 #define MT6316_RG_BUCK_VBUCK2_HW2_OP_MODE_ADDR 0x151 145 #define MT6316_RG_BUCK_VBUCK2_HW3_OP_MODE_ADDR 0x151 146 #define MT6316_RG_BUCK_VBUCK3_VOSEL_SLEEP_ADDR 0x158 147 #define MT6316_RG_BUCK_VBUCK3_ONLV_EN_ADDR 0x158 148 #define MT6316_RG_BUCK_VBUCK3_ONLV_EN_SHIFT 4 149 #define MT6316_RG_BUCK_VBUCK3_RC0_OP_EN_ADDR 0x159 150 #define MT6316_RG_BUCK_VBUCK3_RC1_OP_EN_ADDR 0x159 151 #define MT6316_RG_BUCK_VBUCK3_RC2_OP_EN_ADDR 0x159 152 #define MT6316_RG_BUCK_VBUCK3_RC3_OP_EN_ADDR 0x159 153 #define MT6316_RG_BUCK_VBUCK3_RC4_OP_EN_ADDR 0x159 154 #define MT6316_RG_BUCK_VBUCK3_RC5_OP_EN_ADDR 0x159 155 #define MT6316_RG_BUCK_VBUCK3_RC6_OP_EN_ADDR 0x159 156 #define MT6316_RG_BUCK_VBUCK3_RC7_OP_EN_ADDR 0x159 157 #define MT6316_RG_BUCK_VBUCK3_RC8_OP_EN_ADDR 0x159 158 #define MT6316_RG_BUCK_VBUCK3_RC9_OP_EN_ADDR 0x159 159 #define MT6316_RG_BUCK_VBUCK3_RC10_OP_EN_ADDR 0x159 160 #define MT6316_RG_BUCK_VBUCK3_RC11_OP_EN_ADDR 0x159 161 #define MT6316_RG_BUCK_VBUCK3_RC12_OP_EN_ADDR 0x159 162 #define MT6316_RG_BUCK_VBUCK3_RC13_OP_EN_ADDR 0x159 163 #define MT6316_RG_BUCK_VBUCK3_HW0_OP_EN_ADDR 0x159 164 #define MT6316_RG_BUCK_VBUCK3_HW1_OP_EN_ADDR 0x159 165 #define MT6316_RG_BUCK_VBUCK3_HW2_OP_EN_ADDR 0x159 166 #define MT6316_RG_BUCK_VBUCK3_HW3_OP_EN_ADDR 0x159 167 #define MT6316_RG_BUCK_VBUCK3_SW_OP_EN_ADDR 0x159 168 #define MT6316_RG_BUCK_VBUCK3_RC0_OP_CFG_ADDR 0x159 169 #define MT6316_RG_BUCK_VBUCK3_RC1_OP_CFG_ADDR 0x159 170 #define MT6316_RG_BUCK_VBUCK3_RC2_OP_CFG_ADDR 0x159 171 #define MT6316_RG_BUCK_VBUCK3_RC3_OP_CFG_ADDR 0x159 172 #define MT6316_RG_BUCK_VBUCK3_RC4_OP_CFG_ADDR 0x159 173 #define MT6316_RG_BUCK_VBUCK3_RC5_OP_CFG_ADDR 0x159 174 #define MT6316_RG_BUCK_VBUCK3_RC6_OP_CFG_ADDR 0x159 175 #define MT6316_RG_BUCK_VBUCK3_RC7_OP_CFG_ADDR 0x159 176 #define MT6316_RG_BUCK_VBUCK3_RC8_OP_CFG_ADDR 0x159 177 #define MT6316_RG_BUCK_VBUCK3_RC9_OP_CFG_ADDR 0x159 178 #define MT6316_RG_BUCK_VBUCK3_RC10_OP_CFG_ADDR 0x159 179 #define MT6316_RG_BUCK_VBUCK3_RC11_OP_CFG_ADDR 0x159 180 #define MT6316_RG_BUCK_VBUCK3_RC12_OP_CFG_ADDR 0x159 181 #define MT6316_RG_BUCK_VBUCK3_RC13_OP_CFG_ADDR 0x159 182 #define MT6316_RG_BUCK_VBUCK3_HW0_OP_CFG_ADDR 0x159 183 #define MT6316_RG_BUCK_VBUCK3_HW1_OP_CFG_ADDR 0x159 184 #define MT6316_RG_BUCK_VBUCK3_HW2_OP_CFG_ADDR 0x159 185 #define MT6316_RG_BUCK_VBUCK3_HW3_OP_CFG_ADDR 0x159 186 #define MT6316_RG_BUCK_VBUCK3_RC0_OP_MODE_ADDR 0x159 187 #define MT6316_RG_BUCK_VBUCK3_RC1_OP_MODE_ADDR 0x159 188 #define MT6316_RG_BUCK_VBUCK3_RC2_OP_MODE_ADDR 0x159 189 #define MT6316_RG_BUCK_VBUCK3_RC3_OP_MODE_ADDR 0x159 190 #define MT6316_RG_BUCK_VBUCK3_RC4_OP_MODE_ADDR 0x159 191 #define MT6316_RG_BUCK_VBUCK3_RC5_OP_MODE_ADDR 0x159 192 #define MT6316_RG_BUCK_VBUCK3_RC6_OP_MODE_ADDR 0x159 193 #define MT6316_RG_BUCK_VBUCK3_RC7_OP_MODE_ADDR 0x159 194 #define MT6316_RG_BUCK_VBUCK3_RC8_OP_MODE_ADDR 0x159 195 #define MT6316_RG_BUCK_VBUCK3_RC9_OP_MODE_ADDR 0x159 196 #define MT6316_RG_BUCK_VBUCK3_RC10_OP_MODE_ADDR 0x159 197 #define MT6316_RG_BUCK_VBUCK3_RC11_OP_MODE_ADDR 0x159 198 #define MT6316_RG_BUCK_VBUCK3_RC12_OP_MODE_ADDR 0x159 199 #define MT6316_RG_BUCK_VBUCK3_RC13_OP_MODE_ADDR 0x159 200 #define MT6316_RG_BUCK_VBUCK3_HW0_OP_MODE_ADDR 0x159 201 #define MT6316_RG_BUCK_VBUCK3_HW1_OP_MODE_ADDR 0x159 202 #define MT6316_RG_BUCK_VBUCK3_HW2_OP_MODE_ADDR 0x159 203 #define MT6316_RG_BUCK_VBUCK3_HW3_OP_MODE_ADDR 0x159 204 #define MT6316_RG_BUCK_VBUCK4_VOSEL_SLEEP_ADDR 0x160 205 #define MT6316_RG_BUCK_VBUCK4_ONLV_EN_ADDR 0x160 206 #define MT6316_RG_BUCK_VBUCK4_ONLV_EN_SHIFT 4 207 #define MT6316_RG_BUCK_VBUCK4_RC0_OP_EN_ADDR 0x161 208 #define MT6316_RG_BUCK_VBUCK4_RC1_OP_EN_ADDR 0x161 209 #define MT6316_RG_BUCK_VBUCK4_RC2_OP_EN_ADDR 0x161 210 #define MT6316_RG_BUCK_VBUCK4_RC3_OP_EN_ADDR 0x161 211 #define MT6316_RG_BUCK_VBUCK4_RC4_OP_EN_ADDR 0x161 212 #define MT6316_RG_BUCK_VBUCK4_RC5_OP_EN_ADDR 0x161 213 #define MT6316_RG_BUCK_VBUCK4_RC6_OP_EN_ADDR 0x161 214 #define MT6316_RG_BUCK_VBUCK4_RC7_OP_EN_ADDR 0x161 215 #define MT6316_RG_BUCK_VBUCK4_RC8_OP_EN_ADDR 0x161 216 #define MT6316_RG_BUCK_VBUCK4_RC9_OP_EN_ADDR 0x161 217 #define MT6316_RG_BUCK_VBUCK4_RC10_OP_EN_ADDR 0x161 218 #define MT6316_RG_BUCK_VBUCK4_RC11_OP_EN_ADDR 0x161 219 #define MT6316_RG_BUCK_VBUCK4_RC12_OP_EN_ADDR 0x161 220 #define MT6316_RG_BUCK_VBUCK4_RC13_OP_EN_ADDR 0x161 221 #define MT6316_RG_BUCK_VBUCK4_HW0_OP_EN_ADDR 0x161 222 #define MT6316_RG_BUCK_VBUCK4_HW1_OP_EN_ADDR 0x161 223 #define MT6316_RG_BUCK_VBUCK4_HW2_OP_EN_ADDR 0x161 224 #define MT6316_RG_BUCK_VBUCK4_HW3_OP_EN_ADDR 0x161 225 #define MT6316_RG_BUCK_VBUCK4_SW_OP_EN_ADDR 0x161 226 #define MT6316_RG_BUCK_VBUCK4_RC0_OP_CFG_ADDR 0x161 227 #define MT6316_RG_BUCK_VBUCK4_RC1_OP_CFG_ADDR 0x161 228 #define MT6316_RG_BUCK_VBUCK4_RC2_OP_CFG_ADDR 0x161 229 #define MT6316_RG_BUCK_VBUCK4_RC3_OP_CFG_ADDR 0x161 230 #define MT6316_RG_BUCK_VBUCK4_RC4_OP_CFG_ADDR 0x161 231 #define MT6316_RG_BUCK_VBUCK4_RC5_OP_CFG_ADDR 0x161 232 #define MT6316_RG_BUCK_VBUCK4_RC6_OP_CFG_ADDR 0x161 233 #define MT6316_RG_BUCK_VBUCK4_RC7_OP_CFG_ADDR 0x161 234 #define MT6316_RG_BUCK_VBUCK4_RC8_OP_CFG_ADDR 0x161 235 #define MT6316_RG_BUCK_VBUCK4_RC9_OP_CFG_ADDR 0x161 236 #define MT6316_RG_BUCK_VBUCK4_RC10_OP_CFG_ADDR 0x161 237 #define MT6316_RG_BUCK_VBUCK4_RC11_OP_CFG_ADDR 0x161 238 #define MT6316_RG_BUCK_VBUCK4_RC12_OP_CFG_ADDR 0x161 239 #define MT6316_RG_BUCK_VBUCK4_RC13_OP_CFG_ADDR 0x161 240 #define MT6316_RG_BUCK_VBUCK4_HW0_OP_CFG_ADDR 0x161 241 #define MT6316_RG_BUCK_VBUCK4_HW1_OP_CFG_ADDR 0x161 242 #define MT6316_RG_BUCK_VBUCK4_HW2_OP_CFG_ADDR 0x161 243 #define MT6316_RG_BUCK_VBUCK4_HW3_OP_CFG_ADDR 0x161 244 #define MT6316_RG_BUCK_VBUCK4_RC0_OP_MODE_ADDR 0x161 245 #define MT6316_RG_BUCK_VBUCK4_RC1_OP_MODE_ADDR 0x161 246 #define MT6316_RG_BUCK_VBUCK4_RC2_OP_MODE_ADDR 0x161 247 #define MT6316_RG_BUCK_VBUCK4_RC3_OP_MODE_ADDR 0x161 248 #define MT6316_RG_BUCK_VBUCK4_RC4_OP_MODE_ADDR 0x161 249 #define MT6316_RG_BUCK_VBUCK4_RC5_OP_MODE_ADDR 0x161 250 #define MT6316_RG_BUCK_VBUCK4_RC6_OP_MODE_ADDR 0x161 251 #define MT6316_RG_BUCK_VBUCK4_RC7_OP_MODE_ADDR 0x161 252 #define MT6316_RG_BUCK_VBUCK4_RC8_OP_MODE_ADDR 0x161 253 #define MT6316_RG_BUCK_VBUCK4_RC9_OP_MODE_ADDR 0x161 254 #define MT6316_RG_BUCK_VBUCK4_RC10_OP_MODE_ADDR 0x161 255 #define MT6316_RG_BUCK_VBUCK4_RC11_OP_MODE_ADDR 0x161 256 #define MT6316_RG_BUCK_VBUCK4_RC12_OP_MODE_ADDR 0x161 257 #define MT6316_RG_BUCK_VBUCK4_RC13_OP_MODE_ADDR 0x161 258 #define MT6316_RG_BUCK_VBUCK4_HW0_OP_MODE_ADDR 0x161 259 #define MT6316_RG_BUCK_VBUCK4_HW1_OP_MODE_ADDR 0x161 260 #define MT6316_RG_BUCK_VBUCK4_HW2_OP_MODE_ADDR 0x161 261 #define MT6316_RG_BUCK_VBUCK4_HW3_OP_MODE_ADDR 0x161 262 263 #endif /* MT6316_LOWPOWER_REG_H */ 264