1 /* 2 * Copyright (c) 2025, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef DRAMC_H 8 #define DRAMC_H 9 10 #define DRAM_MAX_FREQ 16 11 #define DRAM_MAX_MR_CNT 10 12 #define DRAM_MAX_RK 2 13 14 int init_dramc_info(void *tag_entry); 15 int get_dram_step_freq(unsigned int step); 16 unsigned int get_dram_type(void); 17 18 enum dram_type { 19 TYPE_DDR1 = 1, 20 TYPE_LPDDR2, 21 TYPE_LPDDR3, 22 TYPE_PCDDR3, 23 TYPE_LPDDR4, 24 TYPE_LPDDR4X, 25 TYPE_LPDDR4P, 26 TYPE_LPDDR5, 27 TYPE_LPDDR5X, 28 }; 29 #endif /* DRAMC_H */ 30