xref: /rk3399_ARM-atf/plat/mediatek/include/drivers/dbgtop.h (revision 79e7aae82dd173d1ccc63e5d553222f1d58f12f5)
1 /*
2  * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef DBGTOP_H
8 #define DBGTOP_H
9 
10 int mtk_dbgtop_dram_reserved(int enable);
11 int mtk_dbgtop_cfg_dvfsrc(int enable);
12 int mtk_dbgtop_dfd_count_en(int enable);
13 int mtk_dbgtop_drm_latch_en(int enable);
14 int mtk_dbgtop_dfd_pause_dvfsrc(int enable);
15 
16 #endif /* DBGTOP_H */
17