1 /* 2 * Copyright (c) 2025, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 9 /* MTK header */ 10 #include <drivers/pmic/pmic_swap_api.h> 11 #include <mtk_bl31_interface.h> 12 #include <mtk_sip_svc.h> 13 14 /* UFS generic control flags */ 15 #define UFS_MTK_SIP_VA09_PWR_CTRL BIT(0) 16 #define UFS_MTK_SIP_DEVICE_RESET BIT(1) 17 #define UFS_MTK_SIP_CRYPTO_CTRL BIT(2) 18 #define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3) 19 #define UFS_MTK_SIP_SRAM_PWR_CTRL BIT(5) 20 #define UFS_MTK_SIP_GET_VCC_INFO BIT(6) 21 #define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7) 22 #define UFS_MTK_SIP_MPHY_CTRL BIT(8) 23 #define UFS_MTK_SIP_MTCMOS_CTRL BIT(9) 24 25 enum { 26 VCC_NONE = 0, 27 VCC_1, 28 VCC_2, 29 }; 30 31 static void ufs_get_vcc_info(struct smccc_res *smccc_ret) 32 { 33 if (smccc_ret == NULL) 34 return; 35 36 if (is_second_pmic_pp_swap()) 37 smccc_ret->a1 = VCC_2; 38 else 39 smccc_ret->a1 = VCC_1; 40 } 41 42 static u_register_t ufs_knl_ctrl(u_register_t x1, 43 u_register_t x2, 44 u_register_t x3, 45 u_register_t x4, 46 void *handle, 47 struct smccc_res *smccc_ret) 48 { 49 uint64_t ret = 0; 50 51 switch (x1) { 52 case UFS_MTK_SIP_VA09_PWR_CTRL: 53 ufs_mphy_va09_cg_ctrl((bool)!!x2); 54 break; 55 case UFS_MTK_SIP_DEVICE_RESET: 56 ufs_device_reset_ctrl((bool)!!x2); 57 break; 58 case UFS_MTK_SIP_CRYPTO_CTRL: 59 ufs_crypto_hie_init(); 60 break; 61 case UFS_MTK_SIP_REF_CLK_NOTIFICATION: 62 ufs_ref_clk_status(x2, x3); 63 break; 64 case UFS_MTK_SIP_SRAM_PWR_CTRL: 65 ufs_sram_pwr_ctrl(x2); 66 break; 67 case UFS_MTK_SIP_GET_VCC_INFO: 68 ufs_get_vcc_info(smccc_ret); 69 break; 70 case UFS_MTK_SIP_DEVICE_PWR_CTRL: 71 ufs_device_pwr_ctrl(x2, x3); 72 break; 73 case UFS_MTK_SIP_MPHY_CTRL: 74 ufs_mphy_ctrl(x2); 75 break; 76 case UFS_MTK_SIP_MTCMOS_CTRL: 77 ufs_mtcmos_ctrl(x2); 78 break; 79 default: 80 ret = -1; 81 WARN("[UFS] invalid argument 0x%lx from kernel\n", x1); 82 break; 83 } 84 85 return ret; 86 } 87 88 static u_register_t ufs_bl_ctrl(u_register_t x1, 89 u_register_t x2, 90 u_register_t x3, 91 u_register_t x4, 92 void *handle, 93 struct smccc_res *smccc_ret) 94 { 95 uint64_t ret = 0; 96 97 switch (x1) { 98 case UFS_MTK_SIP_DEVICE_RESET: 99 ufs_device_reset_ctrl(x2); 100 break; 101 default: 102 ret = -1; 103 WARN("[UFS] invalid argument 0x%lx from bootloader\n", x1); 104 break; 105 } 106 107 return ret; 108 } 109 110 DECLARE_SMC_HANDLER(MTK_SIP_KERNEL_UFS_CONTROL, ufs_knl_ctrl); 111 DECLARE_SMC_HANDLER(MTK_SIP_BL_UFS_CONTROL, ufs_bl_ctrl); 112