xref: /rk3399_ARM-atf/plat/mediatek/drivers/ufs/mt8196/ufs_ctrl_soc.c (revision 52e486f6a6192bd18d36cdcbc35c59092eefc810)
1 /*
2  * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <drivers/pmic/pmic_set_lowpower.h>
8 #if defined(CONFIG_MTK_MTCMOS)
9 #include <mtcmos.h>
10 #endif
11 #include <mtk_bl31_interface.h>
12 
13 static void ufs_vsx_lpm(bool lpm, uint64_t ufs_version)
14 {
15 	if (lpm) {
16 		/* MT6363 VS2 voter LOW byte BIT6 vote reduce VS2 voltage */
17 		PMIC_BUCK_VOTER_EN(MT6363, VS2, VOTER_EN_LO_BIT6, VOTER_EN_CLR);
18 
19 		/* VS2 buck can enter LPM */
20 		PMIC_BUCK_SET_LP(MT6363, VS2, HW2, true, OP_MODE_LP, HW_LP);
21 	} else {
22 		/* MT6363 VS2 voter LOW byte BIT6 vote raise VS2 voltage */
23 		PMIC_BUCK_VOTER_EN(MT6363, VS2, VOTER_EN_LO_BIT6, VOTER_EN_SET);
24 
25 		/* VS2 buck can not enter LPM */
26 		PMIC_BUCK_SET_LP(MT6363, VS2, HW2, true, OP_MODE_LP, HW_ONLV);
27 	}
28 }
29 
30 void ufs_device_pwr_ctrl_soc(bool vcc_on, uint64_t ufs_version)
31 {
32 	if (vcc_on)
33 		ufs_vsx_lpm(false, ufs_version);
34 	else
35 		ufs_vsx_lpm(true, ufs_version);
36 }
37 
38 int ufs_spm_mtcmos_power(bool on)
39 {
40 #if defined(CONFIG_MTK_MTCMOS)
41 	return spm_mtcmos_ctrl_ufs0(on ? STA_POWER_ON : STA_POWER_DOWN);
42 #else
43 	return 0;
44 #endif
45 }
46 
47 int ufs_phy_spm_mtcmos_power(bool on)
48 {
49 #if defined(CONFIG_MTK_MTCMOS)
50 	return spm_mtcmos_ctrl_ufs0_phy(on ? STA_POWER_ON : STA_POWER_DOWN);
51 #else
52 	return 0;
53 #endif
54 }
55