xref: /rk3399_ARM-atf/plat/mediatek/drivers/spmi/spmi_sw.h (revision cf2df874cd09305ac7282fadb0fef6be597dfffb)
1*adf73ae2SHope Wang /*
2*adf73ae2SHope Wang  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3*adf73ae2SHope Wang  *
4*adf73ae2SHope Wang  * SPDX-License-Identifier: BSD-3-Clause
5*adf73ae2SHope Wang  */
6*adf73ae2SHope Wang 
7*adf73ae2SHope Wang #ifndef SPMI_SW_H
8*adf73ae2SHope Wang #define SPMI_SW_H
9*adf73ae2SHope Wang 
10*adf73ae2SHope Wang #include <common/debug.h>
11*adf73ae2SHope Wang #include <drivers/delay_timer.h>
12*adf73ae2SHope Wang #include <mt_timer.h>
13*adf73ae2SHope Wang 
14*adf73ae2SHope Wang enum spmi_regs {
15*adf73ae2SHope Wang 	SPMI_OP_ST_CTRL,
16*adf73ae2SHope Wang 	SPMI_GRP_ID_EN,
17*adf73ae2SHope Wang 	SPMI_OP_ST_STA,
18*adf73ae2SHope Wang 	SPMI_MST_SAMPL,
19*adf73ae2SHope Wang 	SPMI_MST_REQ_EN,
20*adf73ae2SHope Wang 	/* RCS support */
21*adf73ae2SHope Wang 	SPMI_RCS_CTRL,
22*adf73ae2SHope Wang 	SPMI_SLV_3_0_EINT,
23*adf73ae2SHope Wang 	SPMI_SLV_7_4_EINT,
24*adf73ae2SHope Wang 	SPMI_SLV_B_8_EINT,
25*adf73ae2SHope Wang 	SPMI_SLV_F_C_EINT,
26*adf73ae2SHope Wang 	SPMI_REC_CTRL,
27*adf73ae2SHope Wang 	SPMI_REC0,
28*adf73ae2SHope Wang 	SPMI_REC1,
29*adf73ae2SHope Wang 	SPMI_REC2,
30*adf73ae2SHope Wang 	SPMI_REC3,
31*adf73ae2SHope Wang 	SPMI_REC4,
32*adf73ae2SHope Wang 	SPMI_REC_CMD_DEC,
33*adf73ae2SHope Wang 	SPMI_DEC_DBG,
34*adf73ae2SHope Wang 	SPMI_MST_DBG
35*adf73ae2SHope Wang };
36*adf73ae2SHope Wang 
37*adf73ae2SHope Wang /* DEBUG MARCO */
38*adf73ae2SHope Wang #define SPMITAG			"[SPMI] "
39*adf73ae2SHope Wang #define SPMI_ERR(fmt, arg...)	ERROR(SPMITAG fmt, ##arg)
40*adf73ae2SHope Wang #define SPMI_ERRL(fmt, arg...)	ERROR(fmt, ##arg)
41*adf73ae2SHope Wang #define SPMI_INFO(fmt, arg...)	INFO(SPMITAG fmt, ##arg)
42*adf73ae2SHope Wang 
43*adf73ae2SHope Wang #define wait_us(cond, timeout)			\
44*adf73ae2SHope Wang ({						\
45*adf73ae2SHope Wang 	uint64_t __now, __end, __ret;		\
46*adf73ae2SHope Wang 						\
47*adf73ae2SHope Wang 	__end = sched_clock() + timeout;	\
48*adf73ae2SHope Wang 	for (;;) {				\
49*adf73ae2SHope Wang 		if (cond) {			\
50*adf73ae2SHope Wang 			__ret = timeout;	\
51*adf73ae2SHope Wang 			break;			\
52*adf73ae2SHope Wang 		}				\
53*adf73ae2SHope Wang 		__now = sched_clock();		\
54*adf73ae2SHope Wang 		if (__end <= __now) {		\
55*adf73ae2SHope Wang 			__ret = 0;		\
56*adf73ae2SHope Wang 			break;			\
57*adf73ae2SHope Wang 		}				\
58*adf73ae2SHope Wang 	}					\
59*adf73ae2SHope Wang 	__ret;					\
60*adf73ae2SHope Wang })
61*adf73ae2SHope Wang 
62*adf73ae2SHope Wang enum {
63*adf73ae2SHope Wang 	SPMI_RESET = 0,
64*adf73ae2SHope Wang 	SPMI_SLEEP,
65*adf73ae2SHope Wang 	SPMI_SHUTDOWN,
66*adf73ae2SHope Wang 	SPMI_WAKEUP
67*adf73ae2SHope Wang };
68*adf73ae2SHope Wang 
69*adf73ae2SHope Wang #endif
70