1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT_SPM_VER_H 8 #define MT_SPM_VER_H 9 10 #include <stdint.h> 11 12 enum mt_plat_dram_to_spm_type { 13 SPMFW_DEFAULT_TYPE = 0, 14 SPMFW_LP4_2CH_3200, 15 SPMFW_LP4X_2CH_3600, 16 SPMFW_LP3_1CH_1866, 17 SPMFW_LP4X_2CH_3733, 18 SPMFW_LP4X_2CH_4266, 19 SPMFW_LP4X_2CH_3200, 20 SPMFW_LP5_2CH_6400, 21 SPMFW_LP5X_4CH_7500, 22 SPMFW_TYPE_NOT_FOUND, 23 }; 24 25 enum pwrctrl_selection { 26 SPM_INIT_PWRCTRL = 0, 27 SPM_VCOREDVFS_PWRCTRL, 28 SPM_IDLE_PWRCTRL, 29 SPM_SUSPEND_PWRCTRL, 30 SPM_PWRCTRL_MAX, 31 }; 32 33 struct pcm_desc { 34 const char *version; /* PCM code version */ 35 uint32_t *base; /* Binary array base */ 36 uintptr_t base_dma; /* DMA addr of base */ 37 uint32_t pmem_words; 38 uint32_t total_words; 39 uint32_t pmem_start; 40 uint32_t dmem_start; 41 }; 42 43 #define DYNA_LOAD_PCM_PATH_SIZE 128 44 #define PCM_FIRMWARE_VERSION_SIZE 128 45 46 struct dyna_load_pcm_t { 47 char path[DYNA_LOAD_PCM_PATH_SIZE]; 48 char version[PCM_FIRMWARE_VERSION_SIZE]; 49 char *buf; 50 struct pcm_desc desc; 51 int ready; 52 }; 53 54 struct load_pcm_fw_t { 55 unsigned int fw_max_num; 56 char **pcm_name_str; 57 struct dyna_load_pcm_t *dyna_load_pcm; 58 unsigned int (*is_fw_running)(void); 59 unsigned int (*get_fw_index)(unsigned int fw_type); 60 int (*fw_init)(struct pcm_desc *desc); 61 int (*fw_run)(unsigned int first, void *pwrctrl); 62 }; 63 64 /* SPM firmware restart definition */ 65 #define SPM_FW_FORCE_RESET BIT(0) 66 #define SPM_FW_FORCE_RESUME BIT(1) 67 int spm_firmware_restart(unsigned int force, void *pwrctrl); 68 int spm_firmware_type_get(void); 69 void spm_firmware_type_probe(unsigned int type); 70 void spm_firmware_init(uint64_t addr, uint64_t size); 71 uint64_t spm_load_firmware_status(void); 72 void register_load_fw(struct load_pcm_fw_t *info); 73 74 #endif /* MT_SPM_VER_H */ 75