xref: /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt_spm_stats.h (revision af0370f25a6663a0d737bbfb3985df4232eaaa55)
1*532ac057SKun Lu /*
2*532ac057SKun Lu  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3*532ac057SKun Lu  *
4*532ac057SKun Lu  * SPDX-License-Identifier: BSD-3-Clause
5*532ac057SKun Lu  */
6*532ac057SKun Lu 
7*532ac057SKun Lu #ifndef MT_SPM_STATS_H
8*532ac057SKun Lu #define MT_SPM_STATS_H
9*532ac057SKun Lu 
10*532ac057SKun Lu #include <stdint.h>
11*532ac057SKun Lu 
12*532ac057SKun Lu enum spm_stat_type {
13*532ac057SKun Lu 	SPM_SLP_COUNT,
14*532ac057SKun Lu 	SPM_SLP_DURATION,
15*532ac057SKun Lu };
16*532ac057SKun Lu 
17*532ac057SKun Lu enum spm_stat_state {
18*532ac057SKun Lu 	SPM_STAT_MCUSYS,
19*532ac057SKun Lu 	SPM_STAT_F26M,
20*532ac057SKun Lu 	SPM_STAT_VCORE,
21*532ac057SKun Lu 	SPM_STAT_D1_2,
22*532ac057SKun Lu 	SPM_STAT_D2,
23*532ac057SKun Lu 	SPM_STAT_D3,
24*532ac057SKun Lu 	SPM_STAT_D4,
25*532ac057SKun Lu 	SPM_STAT_D6X,
26*532ac057SKun Lu 	NUM_SPM_STAT,
27*532ac057SKun Lu };
28*532ac057SKun Lu 
29*532ac057SKun Lu struct spm_lp_stat_record {
30*532ac057SKun Lu 	uint64_t count;
31*532ac057SKun Lu 	uint64_t duration;
32*532ac057SKun Lu };
33*532ac057SKun Lu 
34*532ac057SKun Lu struct spm_lp_stat {
35*532ac057SKun Lu 	struct spm_lp_stat_record record[NUM_SPM_STAT];
36*532ac057SKun Lu };
37*532ac057SKun Lu 
38*532ac057SKun Lu void mt_spm_update_lp_stat(struct spm_lp_stat *stat);
39*532ac057SKun Lu 
40*532ac057SKun Lu uint64_t mt_spm_get_lp_stat(struct spm_lp_stat *stat,
41*532ac057SKun Lu 			    uint32_t index, uint32_t type);
42*532ac057SKun Lu 
43*532ac057SKun Lu #endif /* MT_SPM_STATS_H */
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