xref: /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/mt_spm_suspend.h (revision cf2df874cd09305ac7282fadb0fef6be597dfffb)
1*01ce1d5dSWenzhen Yu /*
2*01ce1d5dSWenzhen Yu  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3*01ce1d5dSWenzhen Yu  *
4*01ce1d5dSWenzhen Yu  * SPDX-License-Identifier: BSD-3-Clause
5*01ce1d5dSWenzhen Yu  */
6*01ce1d5dSWenzhen Yu 
7*01ce1d5dSWenzhen Yu #ifndef MT_SPM_SUSPEND_H
8*01ce1d5dSWenzhen Yu #define MT_SPM_SUSPEND_H
9*01ce1d5dSWenzhen Yu 
10*01ce1d5dSWenzhen Yu #include <mt_spm_internal.h>
11*01ce1d5dSWenzhen Yu 
12*01ce1d5dSWenzhen Yu struct suspend_dbg_ctrl {
13*01ce1d5dSWenzhen Yu 	uint32_t sleep_suspend_cnt;
14*01ce1d5dSWenzhen Yu };
15*01ce1d5dSWenzhen Yu 
16*01ce1d5dSWenzhen Yu enum mt_spm_suspend_mode {
17*01ce1d5dSWenzhen Yu 	MT_SPM_SUSPEND_SYSTEM_PDN,
18*01ce1d5dSWenzhen Yu 	MT_SPM_SUSPEND_SLEEP,
19*01ce1d5dSWenzhen Yu };
20*01ce1d5dSWenzhen Yu 
21*01ce1d5dSWenzhen Yu int mt_spm_suspend_mode_set(enum mt_spm_suspend_mode mode, void *prv);
22*01ce1d5dSWenzhen Yu 
23*01ce1d5dSWenzhen Yu int mt_spm_suspend_enter(int state_id, uint32_t ext_opand,
24*01ce1d5dSWenzhen Yu 			 uint32_t reosuce_req);
25*01ce1d5dSWenzhen Yu 
26*01ce1d5dSWenzhen Yu void mt_spm_suspend_resume(int state_id, uint32_t ext_opand,
27*01ce1d5dSWenzhen Yu 			   struct wake_status **status);
28*01ce1d5dSWenzhen Yu 
29*01ce1d5dSWenzhen Yu int mt_spm_suspend_get_spm_lp(struct spm_lp_scen **lp);
30*01ce1d5dSWenzhen Yu 
31*01ce1d5dSWenzhen Yu #endif /* MT_SPM_SUSPEND_H */
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