1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT_SPM_H 8 #define MT_SPM_H 9 10 #include <stdint.h> 11 #include <stdio.h> 12 13 #include <lib/pm/mtk_pm.h> 14 #include <lpm_v2/mt_lp_rq.h> 15 #include <mt_spm_common_v1.h> 16 17 #define CLK_SCP_CFG_0 (CKSYS_BASE + 0x1A0) 18 #define INFRA_BUS_DCM_CTRL (INFRACFG_AO_BASE + 0x070) 19 #define RG_AXI_DCM_DIS_EN BIT(21) 20 #define RG_PLLCK_SEL_NO_SPM BIT(22) 21 22 #define MT_SPM_TIME_GET(tm) ({ (tm) = el3_uptime(); }) 23 24 #define SPM_FW_NO_RESUME 1 25 #define MCUSYS_MTCMOS_ON 0 26 #define WAKEUP_LOG_ON 0 27 28 #define MT_SPM_USING_SRCLKEN_RC 29 /* SPM extern operand definition */ 30 #define MT_SPM_EX_OP_CLR_26M_RECORD BIT(0) 31 #define MT_SPM_EX_OP_SET_WDT BIT(1) 32 #define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ BIT(2) 33 #define MT_SPM_EX_OP_SET_SUSPEND_MODE BIT(3) 34 #define MT_SPM_EX_OP_SET_IS_ADSP BIT(4) 35 #define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM BIT(5) 36 #define MT_SPM_EX_OP_HW_S1_DETECT BIT(6) 37 #define MT_SPM_EX_OP_TRACE_LP BIT(7) 38 #define MT_SPM_EX_OP_TRACE_SUSPEND BIT(8) 39 #define MT_SPM_EX_OP_TRACE_TIMESTAMP_EN BIT(9) 40 #define MT_SPM_EX_OP_TIME_CHECK BIT(10) 41 #define MT_SPM_EX_OP_TIME_OBS BIT(11) 42 #define MT_SPM_EX_OP_SET_IS_USB_HEADSET BIT(12) 43 #define MT_SPM_EX_OP_SET_IS_FM_AUDIO BIT(13) 44 #define MT_SPM_EX_OP_DEVICES_SAVE BIT(14) 45 #define MT_SPM_EX_OP_NOTIFY_INFRA_OFF BIT(15) 46 47 #define MT_BUS26M_EXT_LP_26M_ON_MODE (MT_SPM_EX_OP_SET_IS_ADSP | \ 48 MT_SPM_EX_OP_SET_IS_FM_AUDIO) 49 50 #define MT_VCORE_EXT_LP_VCORE_ON_MODE (MT_SPM_EX_OP_SET_IS_ADSP | \ 51 MT_SPM_EX_OP_SET_IS_FM_AUDIO) 52 53 /* EN SPM INFRA DEBUG OUT */ 54 #define DEBUGSYS_DEBUG_EN_REG (DBGSYS_DEM_BASE + 0x94) 55 56 /* INFRA_AO_DEBUG_CON */ 57 #define INFRA_AO_DBG_CON0 (INFRACFG_AO_BASE + 0x500) 58 #define INFRA_AO_DBG_CON1 (INFRACFG_AO_BASE + 0x504) 59 #define INFRA_AO_DBG_CON2 (INFRACFG_AO_BASE + 0x508) 60 #define INFRA_AO_DBG_CON3 (INFRACFG_AO_BASE + 0x50C) 61 62 /* SPM init. related registers */ 63 #define VLP_AO_APC_CON (VLP_AO_DEVAPC_APB_BASE + 0xF00) 64 #define VLP_AO_MAS_SEC_0 (VLP_AO_DEVAPC_APB_BASE + 0xA00) 65 #define SCP_CFGREG_PERI_BUS_CTRL0 (SCP_CFGREG_BASE + 0x24) 66 #define MODULE_SW_CG_0_MASK (INFRACFG_AO_BASE + 0x060) 67 #define VLP_DBG_MON_SEL0_ADDR (VLPCFG_BUS_BASE + 0x108) 68 #define VLP_DBG_MON_SEL1_ADDR (VLPCFG_BUS_BASE + 0x10C) 69 #define VLP_CLKSQ_CON1 (VLP_CKSYS_BASE + 0x224) 70 #define VLP_AP_PLL_CON3 (VLP_CKSYS_BASE + 0x264) 71 72 /* SPM SRAM Data */ 73 #define SPM_SRAM_TIMESTAMP_START (SPM_SRAM_BASE + 0xF80) 74 #define SPM_SRAM_TIMESTAMP_END (SPM_SRAM_BASE + 0xFFC) 75 #define SPM_SRAM_TIMESTAMP_SIZE \ 76 (((SPM_SRAM_TIMESTAMP_END - SPM_SRAM_TIMESTAMP_START) >> 2) + 1) 77 78 struct spm_lp_scen; 79 80 int mt_spm_common_sodi_get_spm_pcm_flag(uint32_t *lp, uint32_t idx); 81 void mt_spm_common_sodi_en(bool en); 82 int mt_spm_common_sodi_get_spm_lp(struct spm_lp_scen **lp); 83 void mt_spm_set_common_sodi_pwrctr(void); 84 void mt_spm_set_common_sodi_pcm_flags(void); 85 extern struct pwr_ctrl spm_init_ctrl; 86 87 #endif /* MT_SPM_H */ 88