1*d701cf81SKun Lu# 2*d701cf81SKun Lu# Copyright (c) 2025, MediaTek Inc. All rights reserved. 3*d701cf81SKun Lu# 4*d701cf81SKun Lu# SPDX-License-Identifier: BSD-3-Clause 5*d701cf81SKun Lu# 6*d701cf81SKun Lu 7*d701cf81SKun LuNOTIFIER_VER := v4 8*d701cf81SKun Lu 9*d701cf81SKun Lu#TRACER_VER := v1 10*d701cf81SKun Lu 11*d701cf81SKun Lu#SPM_VER := v2 12*d701cf81SKun Lu 13*d701cf81SKun Lu#COND_CHECK_VER := v1 14*d701cf81SKun Lu 15*d701cf81SKun Lu#PMIC_GS_DUMP_VER := v1 16*d701cf81SKun Lu 17*d701cf81SKun LuPMIC_WRAP_VER := v1 18*d701cf81SKun Lu 19*d701cf81SKun LuMTK_SPM_COMMON_DRV := y 20*d701cf81SKun Lu 21*d701cf81SKun Lu# Enable or disable spm feature 22*d701cf81SKun LuMT_SPM_FEATURE_SUPPORT := y 23*d701cf81SKun Lu 24*d701cf81SKun Lu# Enable or disable cirq restore 25*d701cf81SKun LuMT_SPM_CIRQ_FEATURE_SUPPORT := y 26*d701cf81SKun Lu 27*d701cf81SKun Lu# Enable or disable get dram type from dramc 28*d701cf81SKun LuMT_SPMFW_LOAD_BY_DRAM_TYPE := n 29*d701cf81SKun Lu 30*d701cf81SKun Lu# Enable or disable sspm sram 31*d701cf81SKun LuMT_SPMFW_SPM_SRAM_SLEEP_SUPPORT := n 32*d701cf81SKun Lu 33*d701cf81SKun Lu# Enable or disable uart save/restore 34*d701cf81SKun Lu#uart not ready -- /common/drivers/uart is not exist, /drivers/uart no rule.mk 35*d701cf81SKun LuMT_SPM_UART_SUSPEND_SUPPORT := n 36*d701cf81SKun Lu 37*d701cf81SKun Lu# Enable or disable pmic wrap reg dump 38*d701cf81SKun LuMT_SPM_PMIC_WRAP_DUMP_SUPPORT := n 39*d701cf81SKun Lu 40*d701cf81SKun Lu# spm timestamp support 41*d701cf81SKun LuMT_SPM_TIMESTAMP_SUPPORT := n 42*d701cf81SKun Lu 43*d701cf81SKun LuMTK_SPM_PMIC_LP_SUPPORT := y 44*d701cf81SKun Lu 45*d701cf81SKun LuCONSTRAINT_ID_ALL := 0xff 46*d701cf81SKun Lu$(eval $(call add_defined_option,CONSTRAINT_ID_ALL)) 47*d701cf81SKun Lu 48*d701cf81SKun Luifneq (${PMIC_GS_DUMP_VER},) 49*d701cf81SKun Lu$(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP)) 50*d701cf81SKun Lu$(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP_SUSPEND)) 51*d701cf81SKun Lu$(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP_SODI3)) 52*d701cf81SKun Lu$(eval $(call add_define,MTK_SPM_PMIC_GS_DUMP_DPIDLE)) 53*d701cf81SKun Luendif 54*d701cf81SKun Lu 55*d701cf81SKun Luifeq (${MT_SPM_FEATURE_SUPPORT},n) 56*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_SPM_UNSUPPORT)) 57*d701cf81SKun Luelse 58*d701cf81SKun Lu$(eval $(call add_define,MT_SPM_FEATURE_SUPPORT)) 59*d701cf81SKun Luendif 60*d701cf81SKun Lu 61*d701cf81SKun Luifeq (${MT_SPMFW_LOAD_BY_DRAM_TYPE},n) 62*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_DRAMC_UNSUPPORT)) 63*d701cf81SKun Luendif 64*d701cf81SKun Lu 65*d701cf81SKun Luifeq (${MT_SPM_CIRQ_FEATURE_SUPPORT},n) 66*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_CIRQ_UNSUPPORT)) 67*d701cf81SKun Luendif 68*d701cf81SKun Lu 69*d701cf81SKun Luifeq (${MT_SPMFW_SPM_SRAM_SLEEP_SUPPORT},n) 70*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_SPM_SRAM_SLP_UNSUPPORT)) 71*d701cf81SKun Luendif 72*d701cf81SKun Lu 73*d701cf81SKun Luifeq (${NOTIFIER_VER},) 74*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_SPM_SSPM_NOTIFIER_UNSUPPORT)) 75*d701cf81SKun Luendif 76*d701cf81SKun Lu 77*d701cf81SKun Luifeq (${MT_SPM_UART_SUSPEND_SUPPORT},n) 78*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_SPM_UART_UNSUPPORT)) 79*d701cf81SKun Luendif 80*d701cf81SKun Lu 81*d701cf81SKun Luifeq (${MT_SPM_PMIC_WRAP_DUMP_SUPPORT},n) 82*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_SPM_PMIC_WRAP_DUMP_UNSUPPORT)) 83*d701cf81SKun Luendif 84*d701cf81SKun Lu 85*d701cf81SKun Luifeq (${TRACER_VER},) 86*d701cf81SKun Lu$(eval $(call add_define,MTK_PLAT_SPM_TRACE_UNSUPPORT)) 87*d701cf81SKun Luendif 88*d701cf81SKun Lu 89*d701cf81SKun Luifeq (${MT_SPM_TIMESTAMP_SUPPORT},y) 90*d701cf81SKun Lu$(eval $(call add_define,MT_SPM_TIMESTAMP_SUPPORT)) 91*d701cf81SKun Luendif 92*d701cf81SKun Lu 93*d701cf81SKun Luifeq ($(MTK_VOLTAGE_BIN_VCORE),y) 94*d701cf81SKun Lu$(eval $(call add_define,MTK_VOLTAGE_BIN_VCORE_SUPPORT)) 95*d701cf81SKun Luendif 96*d701cf81SKun Lu 97*d701cf81SKun Luifeq (${MTK_SPM_PMIC_LP_SUPPORT},y) 98*d701cf81SKun Lu$(eval $(call add_define,MTK_SPM_PMIC_LP_SUPPORT)) 99*d701cf81SKun Luendif 100