xref: /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/mt_spm_suspend.h (revision af0370f25a6663a0d737bbfb3985df4232eaaa55)
1*083cfadbSKun Lu /*
2*083cfadbSKun Lu  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3*083cfadbSKun Lu  *
4*083cfadbSKun Lu  * SPDX-License-Identifier: BSD-3-Clause
5*083cfadbSKun Lu  */
6*083cfadbSKun Lu 
7*083cfadbSKun Lu #ifndef MT_SPM_SUSPEND_H
8*083cfadbSKun Lu #define MT_SPM_SUSPEND_H
9*083cfadbSKun Lu 
10*083cfadbSKun Lu #include <mt_spm_internal.h>
11*083cfadbSKun Lu 
12*083cfadbSKun Lu struct suspend_dbg_ctrl {
13*083cfadbSKun Lu 	uint32_t sleep_suspend_cnt;
14*083cfadbSKun Lu };
15*083cfadbSKun Lu 
16*083cfadbSKun Lu enum mt_spm_suspend_mode {
17*083cfadbSKun Lu 	MT_SPM_SUSPEND_SYSTEM_PDN,
18*083cfadbSKun Lu 	MT_SPM_SUSPEND_SLEEP,
19*083cfadbSKun Lu };
20*083cfadbSKun Lu 
21*083cfadbSKun Lu int mt_spm_suspend_mode_set(enum mt_spm_suspend_mode mode, void *prv);
22*083cfadbSKun Lu 
23*083cfadbSKun Lu int mt_spm_suspend_enter(int state_id, uint32_t ext_opand,
24*083cfadbSKun Lu 			 uint32_t reosuce_req);
25*083cfadbSKun Lu 
26*083cfadbSKun Lu void mt_spm_suspend_resume(int state_id, uint32_t ext_opand,
27*083cfadbSKun Lu 			   struct wake_status **status);
28*083cfadbSKun Lu 
29*083cfadbSKun Lu int mt_spm_suspend_get_spm_lp(struct spm_lp_scen **lp);
30*083cfadbSKun Lu 
31*083cfadbSKun Lu #endif /* MT_SPM_SUSPEND_H */
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