1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT_PLAT_SPM_SETTING_H 8 #define MT_PLAT_SPM_SETTING_H 9 10 #include <sleep_def.h> 11 12 enum plat_spm_cond { 13 PLAT_SPM_COND_MAX = 0, 14 }; 15 16 enum pmic_wrap_phase_id { 17 PMIC_WRAP_PHASE_ALLINONE, 18 NR_PMIC_WRAP_PHASE, 19 }; 20 21 /* IDX mapping */ 22 enum { 23 CMD_0, 24 /* 0x0 */ /* PMIC_WRAP_PHASE_ALLINONE */ 25 CMD_1, /* 0x1 */ 26 CMD_2, /* 0x2 */ 27 CMD_3, /* 0x3 */ 28 CMD_4, /* 0x4 */ 29 CMD_5, /* 0x5 */ 30 CMD_6, /* 0x6 */ 31 CMD_7, /* 0x7 */ 32 CMD_8, /* 0x8 */ 33 CMD_9, /* 0x9 */ 34 CMD_10, /* 0xA */ 35 CMD_11, /* 0xB */ 36 CMD_12, /* 0xC */ 37 CMD_13, /* 0xD */ 38 CMD_14, /* 0xE */ 39 CMD_15, /* 0xF */ 40 CMD_16, /* 0x10 */ 41 CMD_17, /* 0x11 */ 42 CMD_18, /* 0x12 */ 43 CMD_19, /* 0x13 */ 44 CMD_20, /* 0x14 */ 45 CMD_21, /* 0x15 */ 46 CMD_22, /* 0x16 */ 47 CMD_23, /* 0x17 */ 48 CMD_24, /* 0x18 */ 49 NR_IDX_ALL, 50 }; 51 52 /* APIs */ 53 void plat_spm_pmic_wrap_init(void); 54 void plat_spm_cond_init(void); 55 56 #endif 57