xref: /rk3399_ARM-atf/plat/mediatek/drivers/rng/mt8188/rng_plat.h (revision 06f3c7058c42a9f1a9f7df75ea2de71a000855e8)
1 /*
2  * Copyright (c) 2024, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef RNG_PLAT_H
8 #define RNG_PLAT_H
9 
10 #include <lib/utils_def.h>
11 
12 #define MTK_TIMEOUT_POLL	1000
13 
14 #define MTK_RETRY_CNT		10
15 
16 #define RNG_DEFAULT_CUTOFF	0x04871C0B
17 
18 /*******************************************************************************
19  * TRNG related constants
20  ******************************************************************************/
21 #define RNG_STATUS		(TRNG_BASE + 0x0004)
22 #define RNG_SWRST		(TRNG_BASE + 0x0010)
23 #define RNG_IRQ_CFG		(TRNG_BASE + 0x0014)
24 #define RNG_EN			(TRNG_BASE + 0x0020)
25 #define RNG_HTEST		(TRNG_BASE + 0x0028)
26 #define RNG_OUT			(TRNG_BASE + 0x0030)
27 #define RNG_RAW			(TRNG_BASE + 0x0038)
28 #define RNG_SRC			(TRNG_BASE + 0x0050)
29 
30 #define RAW_VALID		BIT(12)
31 #define DRBG_VALID		BIT(4)
32 #define RAW_EN			BIT(8)
33 #define NRBG_EN			BIT(4)
34 #define DRBG_EN			BIT(0)
35 #define IRQ_EN			BIT(0)
36 #define SWRST_B			BIT(0)
37 /* Error conditions */
38 #define RNG_ERROR		GENMASK_32(28, 24)
39 #define APB_ERROR		BIT(16)
40 
41 /* External swrst */
42 #define TRNG_SWRST_SET_REG	(INFRACFG_AO_BASE + 0x150)
43 #define TRNG_SWRST_CLR_REG	(INFRACFG_AO_BASE + 0x154)
44 #define RNG_SWRST_B		BIT(13)
45 
46 #endif /* RNG_PLAT_H */
47