1*b88d1f52SSuyuan Su /* 2*b88d1f52SSuyuan Su * Copyright (c) 2024, MediaTek Inc. All rights reserved. 3*b88d1f52SSuyuan Su * 4*b88d1f52SSuyuan Su * SPDX-License-Identifier: BSD-3-Clause 5*b88d1f52SSuyuan Su */ 6*b88d1f52SSuyuan Su 7*b88d1f52SSuyuan Su #ifndef RNG_PLAT_H 8*b88d1f52SSuyuan Su #define RNG_PLAT_H 9*b88d1f52SSuyuan Su 10*b88d1f52SSuyuan Su #include <lib/utils_def.h> 11*b88d1f52SSuyuan Su 12*b88d1f52SSuyuan Su #define MTK_TIMEOUT_POLL 1000 13*b88d1f52SSuyuan Su 14*b88d1f52SSuyuan Su #define MTK_RETRY_CNT 10 15*b88d1f52SSuyuan Su 16*b88d1f52SSuyuan Su #define RNG_DEFAULT_CUTOFF 0x04871C0B 17*b88d1f52SSuyuan Su 18*b88d1f52SSuyuan Su /******************************************************************************* 19*b88d1f52SSuyuan Su * TRNG related constants 20*b88d1f52SSuyuan Su ******************************************************************************/ 21*b88d1f52SSuyuan Su #define RNG_STATUS (TRNG_BASE + 0x0004) 22*b88d1f52SSuyuan Su #define RNG_SWRST (TRNG_BASE + 0x0010) 23*b88d1f52SSuyuan Su #define RNG_IRQ_CFG (TRNG_BASE + 0x0014) 24*b88d1f52SSuyuan Su #define RNG_EN (TRNG_BASE + 0x0020) 25*b88d1f52SSuyuan Su #define RNG_HTEST (TRNG_BASE + 0x0028) 26*b88d1f52SSuyuan Su #define RNG_OUT (TRNG_BASE + 0x0030) 27*b88d1f52SSuyuan Su #define RNG_RAW (TRNG_BASE + 0x0038) 28*b88d1f52SSuyuan Su #define RNG_SRC (TRNG_BASE + 0x0050) 29*b88d1f52SSuyuan Su 30*b88d1f52SSuyuan Su #define RAW_VALID BIT(12) 31*b88d1f52SSuyuan Su #define DRBG_VALID BIT(4) 32*b88d1f52SSuyuan Su #define RAW_EN BIT(8) 33*b88d1f52SSuyuan Su #define NRBG_EN BIT(4) 34*b88d1f52SSuyuan Su #define DRBG_EN BIT(0) 35*b88d1f52SSuyuan Su #define IRQ_EN BIT(0) 36*b88d1f52SSuyuan Su #define SWRST_B BIT(0) 37*b88d1f52SSuyuan Su /* Error conditions */ 38*b88d1f52SSuyuan Su #define RNG_ERROR GENMASK_32(28, 24) 39*b88d1f52SSuyuan Su #define APB_ERROR BIT(16) 40*b88d1f52SSuyuan Su 41*b88d1f52SSuyuan Su /* External swrst */ 42*b88d1f52SSuyuan Su #define TRNG_SWRST_SET_REG (INFRACFG_AO_BASE + 0x150) 43*b88d1f52SSuyuan Su #define TRNG_SWRST_CLR_REG (INFRACFG_AO_BASE + 0x154) 44*b88d1f52SSuyuan Su #define RNG_SWRST_B BIT(13) 45*b88d1f52SSuyuan Su 46*b88d1f52SSuyuan Su #endif /* RNG_PLAT_H */ 47