xref: /rk3399_ARM-atf/plat/mediatek/drivers/pmic_wrap/mt8188/pmic_wrap_init.h (revision 04f28f895f1dc8683838a1382c8f92881f4cf21d)
1*e9310c34SHui Liu /*
2*e9310c34SHui Liu  * Copyright (c) 2022, MediaTek Inc. All rights reserved.
3*e9310c34SHui Liu  *
4*e9310c34SHui Liu  * SPDX-License-Identifier: BSD-3-Clause
5*e9310c34SHui Liu  */
6*e9310c34SHui Liu 
7*e9310c34SHui Liu #ifndef PMIC_WRAP_INIT_H
8*e9310c34SHui Liu #define PMIC_WRAP_INIT_H
9*e9310c34SHui Liu 
10*e9310c34SHui Liu #include <stdint.h>
11*e9310c34SHui Liu 
12*e9310c34SHui Liu #include "platform_def.h"
13*e9310c34SHui Liu #include <pmic_wrap_init_common.h>
14*e9310c34SHui Liu 
15*e9310c34SHui Liu static struct mt8188_pmic_wrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE;
16*e9310c34SHui Liu 
17*e9310c34SHui Liu /* PMIC_WRAP registers */
18*e9310c34SHui Liu struct mt8188_pmic_wrap_regs {
19*e9310c34SHui Liu 	uint32_t init_done;
20*e9310c34SHui Liu 	uint32_t reserved[543];
21*e9310c34SHui Liu 	uint32_t wacs2_cmd;
22*e9310c34SHui Liu 	uint32_t wacs2_wdata;
23*e9310c34SHui Liu 	uint32_t reserved1[3];
24*e9310c34SHui Liu 	uint32_t wacs2_rdata;
25*e9310c34SHui Liu 	uint32_t reserved2[3];
26*e9310c34SHui Liu 	uint32_t wacs2_vldclr;
27*e9310c34SHui Liu 	uint32_t wacs2_sta;
28*e9310c34SHui Liu };
29*e9310c34SHui Liu 
30*e9310c34SHui Liu #endif /* PMIC_WRAP_INIT_H */
31