xref: /rk3399_ARM-atf/plat/mediatek/drivers/pmic/mt8189/pmic_shutdown_cfg.c (revision 270d5c5cd9ad6cecc4b581e8a257c6fcfe7d78d6)
1 /*
2  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3  * SPDX-License-Identifier: BSD-3-Clause
4  */
5 
6 #include <errno.h>
7 
8 #include <common/debug.h>
9 #include <lib/mmio.h>
10 
11 #include "../mt6359p/registers.h"
12 #include <drivers/pmic/pmic_shutdown_cfg.h>
13 #include <drivers/spmi/spmi_common.h>
14 #include <drivers/spmi_api.h>
15 #include <lib/mtk_init/mtk_init.h>
16 #include <pmic_wrap_init_common.h>
17 
18 #define MT6319_RG_SEQ_OFF		0x2d
19 #define MT6319_TOP_RST_MISC_CLR		0x128
20 #define MT6319_TOP_DIG_WPK_H		0x3a9
21 #define MT6319_TOP_DIG_WPK_H_MASK	0xFF
22 #define MT6319_TOP_DIG_WPK_H_SHIFT	0
23 #define MT6319_TOP_DIG_WPK		0x3a8
24 #define MT6319_TOP_DIG_WPK_MASK		0xFF
25 #define MT6319_TOP_DIG_WPK_SHIFT	0
26 
27 
28 int pmic_shutdown_cfg(void)
29 {
30 /*
31  * In mt8189, the pmic_shutdown_cfg() api does not need to read and write the
32  * pmic register to determine the return value and in order not to modify the
33  * common code to affect other ICs, the pmic_shutdown_cfg() will directly
34  * return 1.
35  */
36 	return 1;
37 }
38 
39 static void shutdown_slave_dev(struct spmi_device *dev)
40 {
41 	spmi_ext_register_writel_field(dev, MT6319_TOP_DIG_WPK_H, 0x63,
42 				       MT6319_TOP_DIG_WPK_H_MASK,
43 				       MT6319_TOP_DIG_WPK_H_SHIFT);
44 	spmi_ext_register_writel_field(dev, MT6319_TOP_DIG_WPK, 0x15,
45 				       MT6319_TOP_DIG_WPK_MASK,
46 				       MT6319_TOP_DIG_WPK_SHIFT);
47 
48 	/* Disable WDTRSTB_EN */
49 	spmi_ext_register_writel_field(dev, MT6319_TOP_RST_MISC_CLR, 1, 0x1, 0);
50 	/* Normal sequence power off when PAD_EN falling */
51 	spmi_ext_register_writel_field(dev, MT6319_RG_SEQ_OFF, 1, 0x1, 0);
52 
53 	spmi_ext_register_writel_field(dev, MT6319_TOP_DIG_WPK_H, 0,
54 				       MT6319_TOP_DIG_WPK_H_MASK,
55 				       MT6319_TOP_DIG_WPK_H_SHIFT);
56 	spmi_ext_register_writel_field(dev, MT6319_TOP_DIG_WPK, 0,
57 				       MT6319_TOP_DIG_WPK_MASK,
58 				       MT6319_TOP_DIG_WPK_SHIFT);
59 
60 }
61 
62 int spmi_shutdown(void)
63 {
64 	struct spmi_device *mt6319_sdev;
65 
66 	mt6319_sdev = get_spmi_device(SPMI_MASTER_P_1, SPMI_SLAVE_7);
67 	if (!mt6319_sdev)
68 		return -ENODEV;
69 	shutdown_slave_dev(mt6319_sdev);
70 
71 	if (mmio_read_32((uintptr_t)CHIP_ID_REG) == MTK_CPU_ID_MT8189 &&
72 	    mmio_read_32((uintptr_t)CPU_SEG_ID_REG) == MTK_CPU_SEG_ID_MT8189H) {
73 		mt6319_sdev = get_spmi_device(SPMI_MASTER_P_1, SPMI_SLAVE_8);
74 		if (!mt6319_sdev)
75 			return -ENODEV;
76 		shutdown_slave_dev(mt6319_sdev);
77 	}
78 
79 	/* clear main pmic power hold */
80 	pwrap_write_field(MT6359P_PPCCTL0, 0, 0x1, 0);
81 
82 	return 0;
83 }
84