xref: /rk3399_ARM-atf/plat/mediatek/drivers/pmic/mt8189/pmic_lowpower_init.c (revision f3ecd836afa13c560d63b49c0f05e913011a20b2)
1 /*
2  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3  * SPDX-License-Identifier: BSD-3-Clause
4  */
5 
6 #include <errno.h>
7 
8 #include <common/debug.h>
9 
10 #include <drivers/pmic/mt6319_lowpower_reg.h>
11 #include <drivers/pmic/mt6359p_set_lowpower.h>
12 #include <drivers/pmic/pmic_swap_api.h>
13 #include <lib/mtk_init/mtk_init.h>
14 #include <pmic_wrap_init_common.h>
15 
16 #define PMIC_SLVID_BUCK_SET_LP(_chip, _slvid, _name, _user, _en, _mode, _cfg) \
17 { \
18 	struct spmi_device *sdev = lowpower_sdev[_slvid]; \
19 	if (sdev) {\
20 		pmic_spmi_update_bits(sdev, \
21 				      _chip##_RG_BUCK_##_name##_##_user##_OP_CFG_ADDR, \
22 				      1 << _user, \
23 				      _cfg ? 1 << _user : 0); \
24 		pmic_spmi_update_bits(sdev, \
25 				      _chip##_RG_BUCK_##_name##_##_user##_OP_MODE_ADDR, \
26 				      1 << _user, \
27 				      _mode ? 1 << _user : 0); \
28 		pmic_spmi_update_bits(sdev, \
29 				      _chip##_RG_BUCK_##_name##_##_user##_OP_EN_ADDR, \
30 				      1 << _user, \
31 				      _en ? 1 << _user : 0); \
32 	} \
33 }
34 
35 struct spmi_device *lowpower_sdev[SPMI_MAX_SLAVE_ID];
36 
37 static const uint8_t lowpower_slvid_arr[] = {
38 	SPMI_SLAVE_7,
39 };
40 
41 static int pmic_spmi_update_bits(struct spmi_device *sdev, uint16_t reg,
42 				 uint8_t mask, uint8_t val)
43 {
44 	uint8_t orig = 0;
45 	int ret = 0;
46 
47 	ret = spmi_ext_register_readl(sdev, reg, &orig, 1);
48 	if (ret < 0)
49 		return ret;
50 	orig &= ~mask;
51 	orig |= val & mask;
52 	ret = spmi_ext_register_writel(sdev, reg, &orig, 1);
53 	return ret;
54 }
55 
56 static int pmic_lowpower_init(void)
57 {
58 	uint8_t i, slvid;
59 
60 	for (i = 0; i < ARRAY_SIZE(lowpower_slvid_arr); i++) {
61 		slvid = lowpower_slvid_arr[i];
62 		lowpower_sdev[slvid] = get_spmi_device(SPMI_MASTER_P_1, slvid);
63 		if (!lowpower_sdev[slvid])
64 			return -ENODEV;
65 	}
66 
67 	PMIC_SLVID_BUCK_SET_LP(MT6319, SPMI_SLAVE_7, VBUCK3, HW0, true, OP_MODE_LP, HW_LP);
68 
69 	PMIC_BUCK_SET_LP(MT6359P, VPROC2, HW0, true, OP_MODE_LP, HW_OFF);
70 	PMIC_BUCK_SET_LP(MT6359P, VPROC2, HW2, true, OP_MODE_LP, HW_LP);
71 	PMIC_BUCK_SET_LP(MT6359P, VGPU11, HW0, true, OP_MODE_LP, HW_LP);
72 	PMIC_BUCK_SET_LP(MT6359P, VGPU11, HW2, true, OP_MODE_LP, HW_LP);
73 	PMIC_BUCK_SET_LP(MT6359P, VS1, HW0, true, OP_MODE_LP, HW_LP);
74 	PMIC_BUCK_SET_LP(MT6359P, VS1, HW2, true, OP_MODE_LP, HW_LP);
75 	PMIC_BUCK_SET_LP(MT6359P, VS2, HW0, true, OP_MODE_LP, HW_LP);
76 	PMIC_BUCK_SET_LP(MT6359P, VS2, HW2, true, OP_MODE_LP, HW_LP);
77 	PMIC_LDO_SET_LP(MT6359P, VRF12, HW0, true, OP_MODE_LP, HW_LP);
78 	PMIC_LDO_SET_LP(MT6359P, VRF12, HW2, true, OP_MODE_LP, HW_LP);
79 	PMIC_LDO_SET_LP(MT6359P, VA12, HW0, true, OP_MODE_LP, HW_LP);
80 	PMIC_LDO_SET_LP(MT6359P, VA12, HW2, true, OP_MODE_LP, HW_LP);
81 	PMIC_LDO_SET_LP(MT6359P, VA09, HW0, true, OP_MODE_LP, HW_LP);
82 	PMIC_LDO_SET_LP(MT6359P, VA09, HW2, true, OP_MODE_LP, HW_LP);
83 	PMIC_LDO_SET_LP(MT6359P, VAUX18, HW0, true, OP_MODE_LP, HW_LP);
84 	PMIC_LDO_SET_LP(MT6359P, VAUX18, HW2, true, OP_MODE_LP, HW_LP);
85 	PMIC_LDO_SET_LP(MT6359P, VXO22, HW0, true, OP_MODE_LP, HW_LP);
86 	PMIC_LDO_SET_LP(MT6359P, VXO22, HW2, true, OP_MODE_LP, HW_LP);
87 	PMIC_LDO_SET_LP(MT6359P, VUSB, HW0, true, OP_MODE_LP, HW_LP);
88 	PMIC_LDO_SET_LP(MT6359P, VUSB, HW2, true, OP_MODE_LP, HW_LP);
89 	PMIC_LDO_SET_LP(MT6359P, VUFS, HW0, true, OP_MODE_LP, HW_LP);
90 
91 	return 0;
92 }
93 
94 MTK_PLAT_SETUP_0_INIT(pmic_lowpower_init);
95