1*c33b98d7SYidi Lin /* 2*c33b98d7SYidi Lin * Copyright (c) 2025, Mediatek Inc. All rights reserved. 3*c33b98d7SYidi Lin * 4*c33b98d7SYidi Lin * SPDX-License-Identifier: BSD-3-Clause 5*c33b98d7SYidi Lin */ 6*c33b98d7SYidi Lin 7*c33b98d7SYidi Lin #ifndef MMINFRA_H 8*c33b98d7SYidi Lin #define MMINFRA_H 9*c33b98d7SYidi Lin 10*c33b98d7SYidi Lin #include <lib/spinlock.h> 11*c33b98d7SYidi Lin 12*c33b98d7SYidi Lin #include "../mminfra_common.h" 13*c33b98d7SYidi Lin #include <platform_def.h> 14*c33b98d7SYidi Lin 15*c33b98d7SYidi Lin #define VLP_AO_RSVD6 (MTK_VLP_TRACER_MON_BASE + 0x918) 16*c33b98d7SYidi Lin #define MMINFRA_DONE (1U << 0) 17*c33b98d7SYidi Lin 18*c33b98d7SYidi Lin #define SPM_SEMA_MMINFRA (1U << 5) 19*c33b98d7SYidi Lin #define SPM_SEMA_MMINFRA_NR (8) 20*c33b98d7SYidi Lin 21*c33b98d7SYidi Lin #define SEMA_RETRY_CNT (500) 22*c33b98d7SYidi Lin 23*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M0 (0x69C) 24*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M1 (0x6A0) 25*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M2 (0x6A4) 26*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M3 (0x6A8) 27*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M4 (0x6AC) 28*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M5 (0x6B0) 29*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M6 (0x6B4) 30*c33b98d7SYidi Lin #define SPM_SEMAPHORE_M7 (0x6B8) 31*c33b98d7SYidi Lin 32*c33b98d7SYidi Lin #define MMINFRA_HW_VOTER_BASE (0x31A80000) 33*c33b98d7SYidi Lin #define MTK_POLL_HWV_VOTE_US (2) 34*c33b98d7SYidi Lin #define MTK_POLL_HWV_VOTE_CNT (2500) 35*c33b98d7SYidi Lin #define MTK_POLL_DONE_DELAY_US (1) 36*c33b98d7SYidi Lin #define MTK_POLL_DONE_RETRY (3000) 37*c33b98d7SYidi Lin 38*c33b98d7SYidi Lin struct mminfra_hw_sema { 39*c33b98d7SYidi Lin uint32_t base; 40*c33b98d7SYidi Lin uint32_t offset; 41*c33b98d7SYidi Lin uint32_t offset_all[SPM_SEMA_MMINFRA_NR]; 42*c33b98d7SYidi Lin uint32_t set_val; 43*c33b98d7SYidi Lin }; 44*c33b98d7SYidi Lin 45*c33b98d7SYidi Lin struct mminfra_hw_voter { 46*c33b98d7SYidi Lin uint32_t base; 47*c33b98d7SYidi Lin uint32_t set_ofs; 48*c33b98d7SYidi Lin uint32_t clr_ofs; 49*c33b98d7SYidi Lin uint32_t en_ofs; 50*c33b98d7SYidi Lin uint32_t en_shift; 51*c33b98d7SYidi Lin uint32_t done_bits; 52*c33b98d7SYidi Lin }; 53*c33b98d7SYidi Lin 54*c33b98d7SYidi Lin struct mtk_mminfra_pwr_ctrl { 55*c33b98d7SYidi Lin spinlock_t lock; 56*c33b98d7SYidi Lin struct mminfra_hw_voter hw_voter; 57*c33b98d7SYidi Lin struct mminfra_hw_sema hw_sema; 58*c33b98d7SYidi Lin uint32_t ref_cnt; 59*c33b98d7SYidi Lin bool active; 60*c33b98d7SYidi Lin }; 61*c33b98d7SYidi Lin 62*c33b98d7SYidi Lin #endif 63