139f5e278SGavin Liu /* 239f5e278SGavin Liu * Copyright (c) 2025, Mediatek Inc. All rights reserved. 339f5e278SGavin Liu * 439f5e278SGavin Liu * SPDX-License-Identifier: BSD-3-Clause 539f5e278SGavin Liu */ 639f5e278SGavin Liu 7*00105882SYidi Lin #include <mtk_bl31_interface.h> 839f5e278SGavin Liu 9*00105882SYidi Lin uint64_t emi_mpu_read_addr(unsigned int region, unsigned int offset) 1039f5e278SGavin Liu { 11*00105882SYidi Lin return 0; 12*00105882SYidi Lin } 13*00105882SYidi Lin 14*00105882SYidi Lin uint64_t emi_mpu_read_enable(unsigned int region) 15*00105882SYidi Lin { 16*00105882SYidi Lin return 0; 17*00105882SYidi Lin } 18*00105882SYidi Lin 19*00105882SYidi Lin uint64_t emi_mpu_read_aid(unsigned int region, unsigned int aid_shift) 20*00105882SYidi Lin { 21*00105882SYidi Lin return 0; 22*00105882SYidi Lin } 23*00105882SYidi Lin 24*00105882SYidi Lin uint64_t emi_mpu_check_ns_cpu(void) 25*00105882SYidi Lin { 26*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 27*00105882SYidi Lin } 28*00105882SYidi Lin 29*00105882SYidi Lin enum mtk_bl31_status emi_kp_set_protection(size_t start, size_t end, unsigned int region) 30*00105882SYidi Lin { 31*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 32*00105882SYidi Lin } 33*00105882SYidi Lin 34*00105882SYidi Lin enum mtk_bl31_status emi_kp_clear_violation(unsigned int emiid) 35*00105882SYidi Lin { 36*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 37*00105882SYidi Lin } 38*00105882SYidi Lin 39*00105882SYidi Lin enum mtk_bl31_status emi_clear_protection(unsigned int region) 40*00105882SYidi Lin { 41*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 42*00105882SYidi Lin } 43*00105882SYidi Lin 44*00105882SYidi Lin enum mtk_bl31_status emi_clear_md_violation(void) 45*00105882SYidi Lin { 46*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 47*00105882SYidi Lin } 48*00105882SYidi Lin 49*00105882SYidi Lin uint64_t emi_mpu_check_region_info(unsigned int region, uint64_t *sa, uint64_t *ea) 50*00105882SYidi Lin { 51*00105882SYidi Lin return 0; 52*00105882SYidi Lin } 53*00105882SYidi Lin 54*00105882SYidi Lin uint64_t emi_mpu_page_base_region(void) 55*00105882SYidi Lin { 56*00105882SYidi Lin return 0; 57*00105882SYidi Lin } 58*00105882SYidi Lin 59*00105882SYidi Lin uint64_t emi_mpu_smc_hp_mod_check(void) 60*00105882SYidi Lin { 61*00105882SYidi Lin return 0; 62*00105882SYidi Lin } 63*00105882SYidi Lin 64*00105882SYidi Lin enum mtk_bl31_status slb_clear_violation(unsigned int id) 65*00105882SYidi Lin { 66*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 67*00105882SYidi Lin } 68*00105882SYidi Lin 69*00105882SYidi Lin enum mtk_bl31_status emi_clear_violation(unsigned int id, unsigned int type) 70*00105882SYidi Lin { 71*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 72*00105882SYidi Lin } 73*00105882SYidi Lin 74*00105882SYidi Lin enum mtk_bl31_status slc_parity_select(unsigned int id, unsigned int port) 75*00105882SYidi Lin { 76*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 77*00105882SYidi Lin } 78*00105882SYidi Lin 79*00105882SYidi Lin enum mtk_bl31_status slc_parity_clear(unsigned int id) 80*00105882SYidi Lin { 81*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 82*00105882SYidi Lin } 83*00105882SYidi Lin 84*00105882SYidi Lin enum mtk_bl31_status emi_mpu_set_aid(unsigned int region, unsigned int num) 85*00105882SYidi Lin { 86*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 87*00105882SYidi Lin } 88*00105882SYidi Lin 89*00105882SYidi Lin void emi_protection_init(void) 90*00105882SYidi Lin { 91*00105882SYidi Lin } 92*00105882SYidi Lin 93*00105882SYidi Lin enum mtk_bl31_status emi_mpu_set_protection(uint32_t start, uint32_t end, 94*00105882SYidi Lin unsigned int region) 95*00105882SYidi Lin { 96*00105882SYidi Lin return MTK_BL31_STATUS_NOT_SUPPORTED; 9739f5e278SGavin Liu } 98