xref: /rk3399_ARM-atf/plat/mediatek/drivers/disp/mt8189/mtk_disp_plat.c (revision 291e493d15c9c0b3ddec705f866b716a0190bf5e)
1 /*
2  * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <mtk_disp_priv.h>
8 #include <mtk_mmap_pool.h>
9 #include <platform_def.h>
10 
11 /* disp config */
12 #define MMSYS_SEC_DIS_0	(0xA00)
13 #define MMSYS_SEC_DIS_1	(0xA04)
14 #define MMSYS_SEC_DIS_2	(0xA08)
15 #define MMSYS_SHADOW	(0xC00)
16 #define MMSYS_CB_CON	(0xC0C)
17 #define MMSYS_CG_CON	(0x110)
18 
19 const struct mtk_disp_config mt8189_disp_cfg[] = {
20 	/*SECURITY0*/
21 	DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SEC_DIS_0, 0xFFFFFFFF),
22 	/*SECURITY1*/
23 	DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SEC_DIS_1, 0xFFFFFFFF),
24 	/*SECURITY2*/
25 	DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SEC_DIS_2, 0xFFFFFFFF),
26 	/*SHADOW*/
27 	DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SHADOW, 0x1),
28 	/*CROSSBAR*/
29 	DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_CB_CON, 0x00FF0000),
30 	/*CG_BIT*/
31 	DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_CG_CON, 0x10000),
32 };
33 
34 const struct mtk_disp_config *disp_cfg = &mt8189_disp_cfg[0];
35 const size_t disp_cfg_count = ARRAY_SIZE(mt8189_disp_cfg);
36