1*69970765Sxiandong.wang /* 2*69970765Sxiandong.wang * Copyright (c) 2025, MediaTek Inc. All rights reserved. 3*69970765Sxiandong.wang * 4*69970765Sxiandong.wang * SPDX-License-Identifier: BSD-3-Clause 5*69970765Sxiandong.wang */ 6*69970765Sxiandong.wang 7*69970765Sxiandong.wang #include <mtk_disp_priv.h> 8*69970765Sxiandong.wang #include <mtk_mmap_pool.h> 9*69970765Sxiandong.wang #include <platform_def.h> 10*69970765Sxiandong.wang 11*69970765Sxiandong.wang /* disp config */ 12*69970765Sxiandong.wang #define MMSYS_SEC_DIS_0 (0xA00) 13*69970765Sxiandong.wang #define MMSYS_SEC_DIS_1 (0xA04) 14*69970765Sxiandong.wang #define MMSYS_SEC_DIS_2 (0xA08) 15*69970765Sxiandong.wang #define MMSYS_SHADOW (0xC00) 16*69970765Sxiandong.wang #define MMSYS_CB_CON (0xC0C) 17*69970765Sxiandong.wang #define MMSYS_CG_CON (0x110) 18*69970765Sxiandong.wang 19*69970765Sxiandong.wang const struct mtk_disp_config mt8189_disp_cfg[] = { 20*69970765Sxiandong.wang /*SECURITY0*/ 21*69970765Sxiandong.wang DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SEC_DIS_0, 0xFFFFFFFF), 22*69970765Sxiandong.wang /*SECURITY1*/ 23*69970765Sxiandong.wang DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SEC_DIS_1, 0xFFFFFFFF), 24*69970765Sxiandong.wang /*SECURITY2*/ 25*69970765Sxiandong.wang DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SEC_DIS_2, 0xFFFFFFFF), 26*69970765Sxiandong.wang /*SHADOW*/ 27*69970765Sxiandong.wang DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_SHADOW, 0x1), 28*69970765Sxiandong.wang /*CROSSBAR*/ 29*69970765Sxiandong.wang DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_CB_CON, 0x00FF0000), 30*69970765Sxiandong.wang /*CG_BIT*/ 31*69970765Sxiandong.wang DISP_CFG_ENTRY(MMSYS_CONFIG_BASE + MMSYS_CG_CON, 0x10000), 32*69970765Sxiandong.wang }; 33*69970765Sxiandong.wang 34*69970765Sxiandong.wang const struct mtk_disp_config *disp_cfg = &mt8189_disp_cfg[0]; 35*69970765Sxiandong.wang const size_t disp_cfg_count = ARRAY_SIZE(mt8189_disp_cfg); 36