xref: /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/mt_smp.h (revision b62673c645752a78f649282cfa293e8da09e3bef)
1 /*
2  * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef MT_SMP_H
8 #define MT_SMP_H
9 
10 #include <lib/mmio.h>
11 #include <platform_def.h>
12 
13 #include "mt_cpu_pm.h"
14 
15 #define CPUSYS_PPU_CLK_EN_CTRL		BIT(12)
16 #define CPUSYS_PPU_ISO_CTRL		BIT(13)
17 #define AA64NAA32_FLAG_START_BIT	16
18 
19 #define SMP_CORE_TIMEOUT_MAX		(50000)
20 #define DO_SMP_CORE_ON_WAIT_TIMEOUT(cpu_id, k_cnt) ({ \
21 	if (k_cnt >= SMP_CORE_TIMEOUT_MAX) { \
22 		INFO("[%s:%d] - CORE%d ON WAIT TIMEOUT %u us (> %u)\n", \
23 		     __func__, __LINE__, cpu_id, k_cnt, SMP_CORE_TIMEOUT_MAX); \
24 		panic(); \
25 	} \
26 	k_cnt++; udelay(1); })
27 
28 #ifdef CPU_PM_CORE_ARCH64_ONLY
29 #define mt_smp_core_init_arch(_a, _b, _c, _d)
30 #else
31 void mt_smp_core_init_arch(int cluster, int cpu, int arm64,
32 			   struct cpu_pwr_ctrl *pwr_ctrl);
33 #endif /* CPU_PM_CORE_ARCH64_ONLY */
34 
35 void mt_smp_core_bootup_address_set(int cluster,
36 				    int cpu,
37 				    struct cpu_pwr_ctrl *pwr_ctrl,
38 				    uintptr_t entry);
39 
40 int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl);
41 int mt_smp_power_core_off(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl);
42 
43 void mt_smp_init(void);
44 
45 int mt_smp_cluster_pwpr_init(struct cluster_pwr_ctrl *pwr_ctrl);
46 int mt_smp_cluster_pwpr_op_init(struct cluster_pwr_ctrl *pwr_ctrl);
47 
48 #endif /* MT_SMP_H */
49