1 /* 2 * Copyright (c) 2022, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MT_SMP_H 8 #define MT_SMP_H 9 10 #include <lib/mmio.h> 11 #include <platform_def.h> 12 13 /* === SPM related registers */ 14 #define SPM_POWERON_CONFIG_EN (SPM_BASE + 0x000) 15 #define CPU_PWR_STATUS (MCUCFG_BASE + 0xA840) 16 /* bit-fields of SPM_POWERON_CONFIG_EN */ 17 #define PROJECT_CODE (0xB16U << 16) 18 #define BCLK_CG_EN BIT(0) 19 20 #define SMP_CORE_TIMEOUT_MAX (50000) 21 #define DO_SMP_CORE_ON_WAIT_TIMEOUT(k_cnt) ({ \ 22 CPU_PM_ASSERT(k_cnt < SMP_CORE_TIMEOUT_MAX); \ 23 k_cnt++; udelay(1); }) 24 25 void mt_smp_core_init_arch(unsigned int cluster, unsigned int cpu, int arm64, 26 struct cpu_pwr_ctrl *pwr_ctrl); 27 void mt_smp_core_bootup_address_set(struct cpu_pwr_ctrl *pwr_ctrl, uintptr_t entry); 28 int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl); 29 int mt_smp_power_core_off(struct cpu_pwr_ctrl *pwr_ctrl); 30 void mt_smp_init(void); 31 32 #endif /* MT_SMP_H */ 33