xref: /rk3399_ARM-atf/plat/mediatek/drivers/audio/mt8196/audio_domain.c (revision c52ef2a0e5603c98930e8ce76f389f0fcf23ba02)
1*6866675aSCyril Chao /*
2*6866675aSCyril Chao  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3*6866675aSCyril Chao  *
4*6866675aSCyril Chao  * SPDX-License-Identifier: BSD-3-Clause
5*6866675aSCyril Chao  */
6*6866675aSCyril Chao 
7*6866675aSCyril Chao #include <errno.h>
8*6866675aSCyril Chao #include <common/debug.h>
9*6866675aSCyril Chao 
10*6866675aSCyril Chao #include <audio.h>
11*6866675aSCyril Chao #include <mt_audio_private.h>
12*6866675aSCyril Chao #include <platform_def.h>
13*6866675aSCyril Chao 
14*6866675aSCyril Chao #define AUDIO_PWR_ACK_BITS 0xC0000000
15*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND0_VAL 0xCCCCCCCC
16*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND1_VAL 0xCCCCCCCC
17*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND2_VAL 0xCCCCCCCC
18*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND3_VAL 0xCCCCCCCC
19*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND4_VAL 0xCCCCCCCC
20*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND5_VAL 0xCCCCCCCC
21*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND6_VAL 0xCCCCCCCC
22*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND7_VAL 0xCCCCCCCC
23*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND8_VAL 0xCCCCCCCC
24*6866675aSCyril Chao #define AFE_SE_DOMAIN_SIDEBAND9_VAL 0xCCCCCCCC
25*6866675aSCyril Chao 
26*6866675aSCyril Chao int32_t set_audio_domain_sidebands(void)
27*6866675aSCyril Chao {
28*6866675aSCyril Chao 	uint32_t val;
29*6866675aSCyril Chao 
30*6866675aSCyril Chao 	val = mmio_read_32(SPM_AUDIO_PWR_CON);
31*6866675aSCyril Chao 
32*6866675aSCyril Chao 	if ((val & AUDIO_PWR_ACK_BITS) != AUDIO_PWR_ACK_BITS) {
33*6866675aSCyril Chao 		ERROR("%s: %s, pwr_status=0x%x.\n", MODULE_TAG, __func__, val);
34*6866675aSCyril Chao 		return -EIO;
35*6866675aSCyril Chao 	}
36*6866675aSCyril Chao 
37*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND0, AFE_SE_DOMAIN_SIDEBAND0_VAL);
38*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND1, AFE_SE_DOMAIN_SIDEBAND1_VAL);
39*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND2, AFE_SE_DOMAIN_SIDEBAND2_VAL);
40*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND3, AFE_SE_DOMAIN_SIDEBAND3_VAL);
41*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND4, AFE_SE_DOMAIN_SIDEBAND4_VAL);
42*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND5, AFE_SE_DOMAIN_SIDEBAND5_VAL);
43*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND6, AFE_SE_DOMAIN_SIDEBAND6_VAL);
44*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND7, AFE_SE_DOMAIN_SIDEBAND7_VAL);
45*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND8, AFE_SE_DOMAIN_SIDEBAND8_VAL);
46*6866675aSCyril Chao 	mmio_write_32(AFE_SE_DOMAIN_SIDEBAND9, AFE_SE_DOMAIN_SIDEBAND9_VAL);
47*6866675aSCyril Chao 
48*6866675aSCyril Chao 	VERBOSE("%s: %s, SIDEBAND0 0x%x, SIDEBAND1 0x%x, SIDEBAND2 0x%x\n",
49*6866675aSCyril Chao 		MODULE_TAG,
50*6866675aSCyril Chao 		__func__,
51*6866675aSCyril Chao 		mmio_read_32(AFE_SE_DOMAIN_SIDEBAND0_MON),
52*6866675aSCyril Chao 		mmio_read_32(AFE_SE_DOMAIN_SIDEBAND1_MON),
53*6866675aSCyril Chao 		mmio_read_32(AFE_SE_DOMAIN_SIDEBAND2_MON));
54*6866675aSCyril Chao 
55*6866675aSCyril Chao 	return 0;
56*6866675aSCyril Chao }
57