1 /* 2 * Copyright (c) 2024, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef APUSYS_RV_PWR_CTL_H 8 #define APUSYS_RV_PWR_CTL_H 9 10 #include "apusys_rv.h" 11 12 /* APU MBOX */ 13 #define MBOX_FUNC_CFG (0xb0) 14 #define MBOX_DOMAIN_CFG (0xe0) 15 #define MBOX_CTRL_LOCK BIT(0) 16 #define MBOX_NO_MPU_SHIFT (16) 17 #define MBOX_RX_NS_SHIFT (16) 18 #define MBOX_RX_DOMAIN_SHIFT (17) 19 #define MBOX_TX_NS_SHIFT (24) 20 #define MBOX_TX_DOMAIN_SHIFT (25) 21 #define MBOX_SIZE (0x100) 22 #define MBOX_NUM (8) 23 24 #define APU_MBOX(i) (((i) < MBOX_NUM) ? (APU_MBOX0 + MBOX_SIZE * (i)) : \ 25 (APU_MBOX1 + MBOX_SIZE * ((i) - MBOX_NUM))) 26 #define APU_MBOX_FUNC_CFG(i) (APU_MBOX(i) + MBOX_FUNC_CFG) 27 #define APU_MBOX_DOMAIN_CFG(i) (APU_MBOX(i) + MBOX_DOMAIN_CFG) 28 29 #define HW_SEM_TIMEOUT (0) 30 31 int apusys_rv_pwr_ctrl(enum APU_PWR_OP op); 32 33 #endif /* APUSYS_RV_PWR_CTL_H */ 34