xref: /rk3399_ARM-atf/plat/mediatek/drivers/apusys/mt8188/apusys_devapc.c (revision 777e3b71bb0a37f98b4105af657d97c2afc2d0bc)
1 /*
2  * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /* TF-A system header */
8 #include <common/debug.h>
9 #include <lib/utils_def.h>
10 
11 /* Vendor header */
12 #include "apusys.h"
13 #include "apusys_devapc.h"
14 #include "apusys_devapc_def.h"
15 #include <platform_def.h>
16 
17 #define DUMP_APUSYS_DAPC	(0)
18 
19 static const struct apc_dom_16 APU_CTRL_DAPC_AO[] = {
20 	/* ctrl index = 0 */
21 	SLAVE_VCORE("apu_ao_ctl_o-0"),
22 	SLAVE_RPC("apu_ao_ctl_o-2"),
23 	SLAVE_PCU("apu_ao_ctl_o-3"),
24 	SLAVE_AO_CTRL("apu_ao_ctl_o-4"),
25 	SLAVE_PLL("apu_ao_ctl_o-5"),
26 	SLAVE_ACC("apu_ao_ctl_o-6"),
27 	SLAVE_SEC("apu_ao_ctl_o-7"),
28 	SLAVE_ARE0("apu_ao_ctl_o-8"),
29 	SLAVE_ARE1("apu_ao_ctl_o-9"),
30 	SLAVE_ARE2("apu_ao_ctl_o-10"),
31 
32 	/* ctrl index = 10 */
33 	SLAVE_UNKNOWN("apu_ao_ctl_o-11"),
34 	SLAVE_AO_BCRM("apu_ao_ctl_o-12"),
35 	SLAVE_AO_DAPC_WRAP("apu_ao_ctl_o-13"),
36 	SLAVE_AO_DAPC_CON("apu_ao_ctl_o-14"),
37 	SLAVE_RCX_ACX_BULK("apu_ao_ctl_o-15"),
38 	SLAVE_UNKNOWN("apu_ao_ctl_o-16"),
39 	SLAVE_UNKNOWN("apu_ao_ctl_o-17"),
40 	SLAVE_APU_BULK("apu_ao_ctl_o-18"),
41 	SLAVE_ACX0_BCRM("apu_ao_ctl_o-20"),
42 	SLAVE_RPCTOP_LITE_ACX0("apu_ao_ctl_o-21"),
43 
44 	/* ctrl index = 20 */
45 	SLAVE_ACX1_BCRM("apu_ao_ctl_o-22"),
46 	SLAVE_RPCTOP_LITE_ACX1("apu_ao_ctl_o-23"),
47 	SLAVE_RCX_TO_ACX0_0("apu_rcx2acx0_o-0"),
48 	SLAVE_RCX_TO_ACX0_1("apu_rcx2acx0_o-1"),
49 	SLAVE_SAE_TO_ACX0_0("apu_sae2acx0_o-0"),
50 	SLAVE_SAE_TO_ACX0_1("apu_sae2acx0_o-1"),
51 	SLAVE_RCX_TO_ACX1_0("apu_rcx2acx1_o-0"),
52 	SLAVE_RCX_TO_ACX1_1("apu_rcx2acx1_o-1"),
53 	SLAVE_SAE_TO_ACX1_0("apu_sae2acx1_o-0"),
54 	SLAVE_SAE_TO_ACX1_1("apu_sae2acx1_o-1"),
55 };
56 
57 static enum apusys_apc_err_status set_slave_ao_ctrl_apc(uint32_t slave,
58 							enum apusys_apc_domain_id domain_id,
59 							enum apusys_apc_perm_type perm)
60 {
61 	uint32_t apc_register_index;
62 	uint32_t apc_set_index;
63 	uint32_t base;
64 	uint32_t clr_bit;
65 	uint32_t set_bit;
66 
67 	if ((perm < 0) || (perm >= PERM_NUM)) {
68 		ERROR(MODULE_TAG "%s: permission type:0x%x is not supported!\n", __func__, perm);
69 		return APUSYS_APC_ERR_GENERIC;
70 	}
71 
72 	if ((slave >= APU_CTRL_DAPC_AO_SLAVE_NUM) ||
73 	    ((domain_id < 0) || (domain_id >= APU_CTRL_DAPC_AO_DOM_NUM))) {
74 		ERROR(MODULE_TAG "%s: out of boundary, slave:0x%x, domain_id:0x%x\n",
75 		      __func__, slave, domain_id);
76 		return APUSYS_APC_ERR_GENERIC;
77 	}
78 
79 	apc_register_index = slave / APU_CTRL_DAPC_AO_SLAVE_NUM_IN_1_DOM;
80 	apc_set_index = slave % APU_CTRL_DAPC_AO_SLAVE_NUM_IN_1_DOM;
81 
82 	clr_bit = (DEVAPC_MASK << (apc_set_index * DEVAPC_DOM_SHIFT));
83 	set_bit = (uint32_t)perm << (apc_set_index * DEVAPC_DOM_SHIFT);
84 
85 	base = (APU_CTRL_DAPC_AO_BASE + domain_id * DEVAPC_DOM_SIZE +
86 		apc_register_index * DEVAPC_REG_SIZE);
87 
88 	mmio_clrsetbits_32(base, clr_bit, set_bit);
89 	return APUSYS_APC_OK;
90 }
91 
92 static void apusys_devapc_init(const char *name, uint32_t base)
93 {
94 	mmio_write_32(APUSYS_DAPC_CON(base), APUSYS_DAPC_CON_VIO_MASK);
95 }
96 
97 int apusys_devapc_ao_init(void)
98 {
99 	enum apusys_apc_err_status ret;
100 
101 	apusys_devapc_init("APUAPC_CTRL_AO", APU_CTRL_DAPC_AO_BASE);
102 
103 	ret = SET_APUSYS_DAPC_V1(APU_CTRL_DAPC_AO, set_slave_ao_ctrl_apc);
104 	if (ret != APUSYS_APC_OK) {
105 		ERROR(MODULE_TAG "%s: set_apusys_ao_ctrl_dap FAILED!\n", __func__);
106 		return -1;
107 	}
108 
109 #if DUMP_APUSYS_DAPC
110 	DUMP_APUSYS_DAPC_V1(APU_CTRL_DAPC_AO);
111 #endif
112 
113 	return 0;
114 }
115