1 /* 2 * Copyright (c) 2023, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* TF-A system header */ 8 #include <common/debug.h> 9 #include <lib/utils_def.h> 10 11 /* Vendor header */ 12 #include "apusys.h" 13 #include "apusys_devapc.h" 14 #include "apusys_devapc_def.h" 15 #include <platform_def.h> 16 17 #define DUMP_APUSYS_DAPC (0) 18 19 static const struct apc_dom_16 APU_NOC_DAPC_RCX[] = { 20 /* ctrl index = 0 */ 21 SLAVE_MD32_SRAM("slv16-0"), 22 SLAVE_MD32_SRAM("slv16-1"), 23 SLAVE_MD32_SRAM("slv16-2"), 24 SLAVE_MD32_SRAM("slv16-3"), 25 SLAVE_MD32_SRAM("slv16-4"), 26 }; 27 28 static const struct apc_dom_16 APU_CTRL_DAPC_AO[] = { 29 /* ctrl index = 0 */ 30 SLAVE_VCORE("apu_ao_ctl_o-0"), 31 SLAVE_RPC("apu_ao_ctl_o-2"), 32 SLAVE_PCU("apu_ao_ctl_o-3"), 33 SLAVE_AO_CTRL("apu_ao_ctl_o-4"), 34 SLAVE_PLL("apu_ao_ctl_o-5"), 35 SLAVE_ACC("apu_ao_ctl_o-6"), 36 SLAVE_SEC("apu_ao_ctl_o-7"), 37 SLAVE_ARE0("apu_ao_ctl_o-8"), 38 SLAVE_ARE1("apu_ao_ctl_o-9"), 39 SLAVE_ARE2("apu_ao_ctl_o-10"), 40 41 /* ctrl index = 10 */ 42 SLAVE_UNKNOWN("apu_ao_ctl_o-11"), 43 SLAVE_AO_BCRM("apu_ao_ctl_o-12"), 44 SLAVE_AO_DAPC_WRAP("apu_ao_ctl_o-13"), 45 SLAVE_AO_DAPC_CON("apu_ao_ctl_o-14"), 46 SLAVE_RCX_ACX_BULK("apu_ao_ctl_o-15"), 47 SLAVE_UNKNOWN("apu_ao_ctl_o-16"), 48 SLAVE_UNKNOWN("apu_ao_ctl_o-17"), 49 SLAVE_APU_BULK("apu_ao_ctl_o-18"), 50 SLAVE_ACX0_BCRM("apu_ao_ctl_o-20"), 51 SLAVE_RPCTOP_LITE_ACX0("apu_ao_ctl_o-21"), 52 53 /* ctrl index = 20 */ 54 SLAVE_ACX1_BCRM("apu_ao_ctl_o-22"), 55 SLAVE_RPCTOP_LITE_ACX1("apu_ao_ctl_o-23"), 56 SLAVE_RCX_TO_ACX0_0("apu_rcx2acx0_o-0"), 57 SLAVE_RCX_TO_ACX0_1("apu_rcx2acx0_o-1"), 58 SLAVE_SAE_TO_ACX0_0("apu_sae2acx0_o-0"), 59 SLAVE_SAE_TO_ACX0_1("apu_sae2acx0_o-1"), 60 SLAVE_RCX_TO_ACX1_0("apu_rcx2acx1_o-0"), 61 SLAVE_RCX_TO_ACX1_1("apu_rcx2acx1_o-1"), 62 SLAVE_SAE_TO_ACX1_0("apu_sae2acx1_o-0"), 63 SLAVE_SAE_TO_ACX1_1("apu_sae2acx1_o-1"), 64 }; 65 66 static const struct apc_dom_16 APU_CTRL_DAPC_RCX[] = { 67 /* ctrl index = 0 */ 68 SLAVE_MD32_SYSCTRL0("md32_apb_s-0"), 69 SLAVE_MD32_SYSCTRL1("md32_apb_s-1"), 70 SLAVE_MD32_WDT("md32_apb_s-2"), 71 SLAVE_MD32_CACHE("md32_apb_s-3"), 72 SLAVE_RPC("apusys_ao-0"), 73 SLAVE_PCU("apusys_ao-1"), 74 SLAVE_AO_CTRL("apusys_ao-2"), 75 SLAVE_PLL("apusys_ao-3"), 76 SLAVE_ACC("apusys_ao-4"), 77 SLAVE_SEC("apusys_ao-5"), 78 79 /* ctrl index = 10 */ 80 SLAVE_ARE0("apusys_ao-6"), 81 SLAVE_ARE1("apusys_ao-7"), 82 SLAVE_ARE2("apusys_ao-8"), 83 SLAVE_UNKNOWN("apusys_ao-9"), 84 SLAVE_AO_BCRM("apusys_ao-10"), 85 SLAVE_AO_DAPC_WRAP("apusys_ao-11"), 86 SLAVE_AO_DAPC_CON("apusys_ao-12"), 87 SLAVE_VCORE("apusys_ao-13"), 88 SLAVE_ACX0_BCRM("apusys_ao-15"), 89 SLAVE_ACX1_BCRM("apusys_ao-16"), 90 91 /* ctrl index = 20 */ 92 SLAVE_NOC_AXI("noc_axi"), 93 SLAVE_MD32_DBG("md32_dbg"), 94 SLAVE_DBG_CRTL("apb_infra_dbg"), 95 SLAVE_IOMMU0_BANK0("apu_n_mmu_r0"), 96 SLAVE_IOMMU0_BANK1("apu_n_mmu_r1"), 97 SLAVE_IOMMU0_BANK2("apu_n_mmu_r2"), 98 SLAVE_IOMMU0_BANK3("apu_n_mmu_r3"), 99 SLAVE_IOMMU0_BANK4("apu_n_mmu_r4"), 100 SLAVE_IOMMU1_BANK0("apu_s_mmu_r0"), 101 SLAVE_IOMMU1_BANK1("apu_s_mmu_r1"), 102 103 /* ctrl index = 30 */ 104 SLAVE_IOMMU1_BANK2("apu_s_mmu_r2"), 105 SLAVE_IOMMU1_BANK3("apu_s_mmu_r3"), 106 SLAVE_IOMMU1_BANK4("apu_s_mmu_r4"), 107 SLAVE_S0_SSC("apu_s0_ssc_cfg"), 108 SLAVE_N0_SSC("apu_n0_ssc_cfg"), 109 SLAVE_ACP_SSC("apu_acp_ssc_cfg"), 110 SLAVE_S1_SSC("apu_s1_ssc_cfg"), 111 SLAVE_N1_SSC("apu_n1_ssc_cfg"), 112 SLAVE_CFG("apu_rcx_cfg"), 113 SLAVE_SEMA_STIMER("apu_sema_stimer"), 114 115 /* ctrl index = 40 */ 116 SLAVE_EMI_CFG("apu_emi_cfg"), 117 SLAVE_LOG("apu_logtop"), 118 SLAVE_CPE_SENSOR("apu_cpe_sensor"), 119 SLAVE_CPE_COEF("apu_cpe_coef"), 120 SLAVE_CPE_CTRL("apu_cpe_ctrl"), 121 SLAVE_UNKNOWN("apu_xpu_rsi"), 122 SLAVE_DFD_REG_SOC("apu_dfd"), 123 SLAVE_SENSOR_WRAP_ACX0_DLA0("apu_sen_ac0_dla0"), 124 SLAVE_SENSOR_WRAP_ACX0_DLA1("apu_sen_ac0_dla1"), 125 SLAVE_SENSOR_WRAP_ACX0_VPU0("apu_sen_ac0_vpu"), 126 127 /* ctrl index = 50 */ 128 SLAVE_SENSOR_WRAP_ACX1_DLA0("apu_sen_ac1_dla0"), 129 SLAVE_SENSOR_WRAP_ACX1_DLA1("apu_sen_ac1_dla1"), 130 SLAVE_SENSOR_WRAP_ACX1_VPU0("apu_sen_ac1_vpu"), 131 SLAVE_REVISER("noc_cfg-0"), 132 SLAVE_NOC("noc_cfg-1"), 133 SLAVE_BCRM("infra_bcrm"), 134 SLAVE_DAPC_WRAP("infra_dapc_wrap"), 135 SLAVE_DAPC_CON("infra_dapc_con"), 136 SLAVE_NOC_DAPC_WRAP("noc_dapc_wrap"), 137 SLAVE_NOC_DAPC_CON("noc_dapc_con"), 138 139 /* ctrl index = 60 */ 140 SLAVE_NOC_BCRM("noc_bcrm"), 141 SLAVE_ACS("apu_rcx_acs"), 142 SLAVE_HSE("apu_hse"), 143 }; 144 145 static enum apusys_apc_err_status set_slave_ao_ctrl_apc(uint32_t slave, 146 enum apusys_apc_domain_id domain_id, 147 enum apusys_apc_perm_type perm) 148 { 149 uint32_t apc_register_index; 150 uint32_t apc_set_index; 151 uint32_t base; 152 uint32_t clr_bit; 153 uint32_t set_bit; 154 155 if ((perm < 0) || (perm >= PERM_NUM)) { 156 ERROR(MODULE_TAG "%s: permission type:0x%x is not supported!\n", __func__, perm); 157 return APUSYS_APC_ERR_GENERIC; 158 } 159 160 if ((slave >= APU_CTRL_DAPC_AO_SLAVE_NUM) || 161 ((domain_id < 0) || (domain_id >= APU_CTRL_DAPC_AO_DOM_NUM))) { 162 ERROR(MODULE_TAG "%s: out of boundary, slave:0x%x, domain_id:0x%x\n", 163 __func__, slave, domain_id); 164 return APUSYS_APC_ERR_GENERIC; 165 } 166 167 apc_register_index = slave / APU_CTRL_DAPC_AO_SLAVE_NUM_IN_1_DOM; 168 apc_set_index = slave % APU_CTRL_DAPC_AO_SLAVE_NUM_IN_1_DOM; 169 170 clr_bit = (DEVAPC_MASK << (apc_set_index * DEVAPC_DOM_SHIFT)); 171 set_bit = (uint32_t)perm << (apc_set_index * DEVAPC_DOM_SHIFT); 172 173 base = (APU_CTRL_DAPC_AO_BASE + domain_id * DEVAPC_DOM_SIZE + 174 apc_register_index * DEVAPC_REG_SIZE); 175 176 mmio_clrsetbits_32(base, clr_bit, set_bit); 177 return APUSYS_APC_OK; 178 } 179 180 static enum apusys_apc_err_status set_slave_noc_dapc_rcx(uint32_t slave, 181 enum apusys_apc_domain_id domain_id, 182 enum apusys_apc_perm_type perm) 183 { 184 uint32_t apc_register_index; 185 uint32_t apc_set_index; 186 uint32_t base; 187 uint32_t clr_bit; 188 uint32_t set_bit; 189 190 if ((perm >= PERM_NUM) || (perm < 0)) { 191 ERROR(MODULE_TAG "%s: permission type:0x%x is not supported!\n", __func__, perm); 192 return APUSYS_APC_ERR_GENERIC; 193 } 194 195 if ((slave >= APU_NOC_DAPC_RCX_SLAVE_NUM) || 196 ((domain_id < 0) || (domain_id >= APU_NOC_DAPC_RCX_DOM_NUM))) { 197 ERROR(MODULE_TAG "%s: out of boundary, slave:0x%x, domain_id:0x%x\n", 198 __func__, slave, domain_id); 199 return APUSYS_APC_ERR_GENERIC; 200 } 201 202 apc_register_index = slave / APU_NOC_DAPC_RCX_SLAVE_NUM_IN_1_DOM; 203 apc_set_index = slave % APU_NOC_DAPC_RCX_SLAVE_NUM_IN_1_DOM; 204 205 clr_bit = (DEVAPC_MASK << (apc_set_index * DEVAPC_DOM_SHIFT)); 206 set_bit = ((uint32_t)perm) << (apc_set_index * DEVAPC_DOM_SHIFT); 207 base = (APU_NOC_DAPC_RCX_BASE + domain_id * DEVAPC_DOM_SIZE + 208 apc_register_index * DEVAPC_REG_SIZE); 209 210 mmio_clrsetbits_32(base, clr_bit, set_bit); 211 return APUSYS_APC_OK; 212 } 213 214 static enum apusys_apc_err_status set_slave_rcx_ctrl_apc(uint32_t slave, 215 enum apusys_apc_domain_id domain_id, 216 enum apusys_apc_perm_type perm) 217 { 218 uint32_t apc_register_index; 219 uint32_t apc_set_index; 220 uint32_t base; 221 uint32_t clr_bit; 222 uint32_t set_bit; 223 224 if ((perm < 0) || (perm >= PERM_NUM)) { 225 ERROR(MODULE_TAG "%s: permission type:0x%x is not supported!\n", __func__, perm); 226 return APUSYS_APC_ERR_GENERIC; 227 } 228 229 if ((slave >= APU_CTRL_DAPC_RCX_SLAVE_NUM) || 230 ((domain_id < 0) || (domain_id >= APU_CTRL_DAPC_RCX_DOM_NUM))) { 231 ERROR(MODULE_TAG "%s: out of boundary, slave:0x%x, domain_id:0x%x\n", 232 __func__, slave, domain_id); 233 return APUSYS_APC_ERR_GENERIC; 234 } 235 236 apc_register_index = slave / APU_CTRL_DAPC_RCX_SLAVE_NUM_IN_1_DOM; 237 apc_set_index = slave % APU_CTRL_DAPC_RCX_SLAVE_NUM_IN_1_DOM; 238 239 clr_bit = (DEVAPC_MASK << (apc_set_index * DEVAPC_DOM_SHIFT)); 240 set_bit = (uint32_t)perm << (apc_set_index * DEVAPC_DOM_SHIFT); 241 base = (APU_CTRL_DAPC_RCX_BASE + domain_id * DEVAPC_DOM_SIZE + 242 apc_register_index * DEVAPC_REG_SIZE); 243 244 mmio_clrsetbits_32(base, clr_bit, set_bit); 245 return APUSYS_APC_OK; 246 } 247 248 static void apusys_devapc_init(const char *name, uint32_t base) 249 { 250 mmio_write_32(APUSYS_DAPC_CON(base), APUSYS_DAPC_CON_VIO_MASK); 251 } 252 253 int apusys_devapc_ao_init(void) 254 { 255 enum apusys_apc_err_status ret; 256 257 apusys_devapc_init("APUAPC_CTRL_AO", APU_CTRL_DAPC_AO_BASE); 258 259 ret = SET_APUSYS_DAPC_V1(APU_CTRL_DAPC_AO, set_slave_ao_ctrl_apc); 260 if (ret != APUSYS_APC_OK) { 261 ERROR(MODULE_TAG "%s: set_apusys_ao_ctrl_dap FAILED!\n", __func__); 262 return -1; 263 } 264 265 #if DUMP_APUSYS_DAPC 266 DUMP_APUSYS_DAPC_V1(APU_CTRL_DAPC_AO); 267 #endif 268 269 return 0; 270 } 271 272 int apusys_devapc_rcx_init(void) 273 { 274 enum apusys_apc_err_status ret; 275 276 apusys_devapc_init("APUAPC_CTRL_RCX", APU_CTRL_DAPC_RCX_BASE); 277 apusys_devapc_init("APUAPC_NOC_RCX", APU_NOC_DAPC_RCX_BASE); 278 279 ret = SET_APUSYS_DAPC_V1(APU_CTRL_DAPC_RCX, set_slave_rcx_ctrl_apc); 280 if (ret != APUSYS_APC_OK) { 281 ERROR(MODULE_TAG "%s: set_slave_rcx_ctrl_apc FAILED!\n", __func__); 282 return -1; 283 } 284 285 #if DUMP_APUSYS_DAPC 286 DUMP_APUSYS_DAPC_V1(APU_CTRL_DAPC_RCX); 287 #endif 288 289 ret = SET_APUSYS_DAPC_V1(APU_NOC_DAPC_RCX, set_slave_noc_dapc_rcx); 290 if (ret != APUSYS_APC_OK) { 291 ERROR(MODULE_TAG "%s: set_slave_noc_dapc_rcx FAILED\n", __func__); 292 return -1; 293 } 294 295 #if DUMP_APUSYS_DAPC 296 DUMP_APUSYS_DAPC_V1(APU_NOC_DAPC_RCX); 297 #endif 298 299 return 0; 300 } 301