xref: /rk3399_ARM-atf/plat/mediatek/drivers/apusys/apusys_rv/2.0/apusys_rv.c (revision 94a9e6243e3978b42017639dad93481267bcf6e4)
1 /*
2  * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /* TF-A system header */
8 #include <common/debug.h>
9 #include <drivers/delay_timer.h>
10 #include <lib/mmio.h>
11 #include <lib/spinlock.h>
12 
13 /* Vendor header */
14 #include "apusys.h"
15 #include "apusys_rv.h"
16 #include "apusys_rv_mbox_mpu.h"
17 
18 static spinlock_t apusys_rv_lock;
19 
20 void apusys_rv_mbox_mpu_init(void)
21 {
22 	int i;
23 
24 	for (i = 0; i < APU_MBOX_NUM; i++) {
25 		mmio_write_32(APU_MBOX_FUNC_CFG(i),
26 			      (MBOX_CTRL_LOCK |
27 			       (mbox_mpu_setting_tab[i].no_mpu << MBOX_NO_MPU_SHIFT)));
28 		mmio_write_32(APU_MBOX_DOMAIN_CFG(i),
29 			      (MBOX_CTRL_LOCK |
30 			       (mbox_mpu_setting_tab[i].rx_ns << MBOX_RX_NS_SHIFT) |
31 			       (mbox_mpu_setting_tab[i].rx_domain << MBOX_RX_DOMAIN_SHIFT) |
32 			       (mbox_mpu_setting_tab[i].tx_ns << MBOX_TX_NS_SHIFT) |
33 			       (mbox_mpu_setting_tab[i].tx_domain << MBOX_TX_DOMAIN_SHIFT)));
34 	}
35 }
36 
37 int apusys_kernel_apusys_rv_setup_reviser(void)
38 {
39 	static bool apusys_rv_setup_reviser_called;
40 
41 	spin_lock(&apusys_rv_lock);
42 
43 	if (apusys_rv_setup_reviser_called) {
44 		WARN(MODULE_TAG "%s: already initialized\n", __func__);
45 		spin_unlock(&apusys_rv_lock);
46 		return -1;
47 	}
48 
49 	apusys_rv_setup_reviser_called = true;
50 
51 	mmio_write_32(USERFW_CTXT, CFG_4GB_SEL_EN | CFG_4GB_SEL);
52 	mmio_write_32(SECUREFW_CTXT, CFG_4GB_SEL_EN | CFG_4GB_SEL);
53 
54 	mmio_write_32(UP_IOMMU_CTRL, MMU_CTRL_LOCK | MMU_CTRL | MMU_EN);
55 
56 	mmio_write_32(UP_NORMAL_DOMAIN_NS,
57 		      (UP_NORMAL_DOMAIN << UP_DOMAIN_SHIFT) | (UP_NORMAL_NS << UP_NS_SHIFT));
58 	mmio_write_32(UP_PRI_DOMAIN_NS,
59 		      (UP_PRI_DOMAIN << UP_DOMAIN_SHIFT) | (UP_PRI_NS << UP_NS_SHIFT));
60 
61 	mmio_write_32(UP_CORE0_VABASE0,
62 		      VLD | PARTIAL_ENABLE | (THREAD_NUM_PRI << THREAD_NUM_SHIFT));
63 	mmio_write_32(UP_CORE0_MVABASE0, VASIZE_1MB | (APU_SEC_FW_IOVA >> MVA_34BIT_SHIFT));
64 
65 	mmio_write_32(UP_CORE0_VABASE1,
66 		      VLD | PARTIAL_ENABLE | (THREAD_NUM_NORMAL << THREAD_NUM_SHIFT));
67 	mmio_write_32(UP_CORE0_MVABASE1, VASIZE_1MB | (APU_SEC_FW_IOVA >> MVA_34BIT_SHIFT));
68 
69 	spin_unlock(&apusys_rv_lock);
70 
71 	return 0;
72 }
73 
74 int apusys_kernel_apusys_rv_reset_mp(void)
75 {
76 	static bool apusys_rv_reset_mp_called;
77 
78 	spin_lock(&apusys_rv_lock);
79 
80 	if (apusys_rv_reset_mp_called) {
81 		WARN(MODULE_TAG "%s: already initialized\n", __func__);
82 		spin_unlock(&apusys_rv_lock);
83 		return -1;
84 	}
85 
86 	apusys_rv_reset_mp_called = true;
87 
88 	mmio_write_32(MD32_SYS_CTRL, MD32_SYS_CTRL_RST);
89 
90 	udelay(RESET_DEALY_US);
91 
92 	mmio_write_32(MD32_SYS_CTRL, MD32_G2B_CG_EN | MD32_DBG_EN | MD32_DM_AWUSER_IOMMU_EN |
93 		      MD32_DM_ARUSER_IOMMU_EN | MD32_PM_AWUSER_IOMMU_EN | MD32_PM_ARUSER_IOMMU_EN |
94 		      MD32_SOFT_RSTN);
95 
96 	mmio_write_32(MD32_CLK_CTRL, MD32_CLK_EN);
97 	mmio_write_32(UP_WAKE_HOST_MASK0, WDT_IRQ_EN);
98 	mmio_write_32(UP_WAKE_HOST_MASK1, MBOX0_IRQ_EN | MBOX1_IRQ_EN | MBOX2_IRQ_EN);
99 
100 	spin_unlock(&apusys_rv_lock);
101 
102 	return 0;
103 }
104 
105 int apusys_kernel_apusys_rv_setup_boot(void)
106 {
107 	static bool apusys_rv_setup_boot_called;
108 
109 	spin_lock(&apusys_rv_lock);
110 
111 	if (apusys_rv_setup_boot_called) {
112 		WARN(MODULE_TAG "%s: already initialized\n", __func__);
113 		spin_unlock(&apusys_rv_lock);
114 		return -1;
115 	}
116 
117 	apusys_rv_setup_boot_called = true;
118 
119 	mmio_write_32(MD32_BOOT_CTRL, APU_SEC_FW_IOVA);
120 
121 	mmio_write_32(MD32_PRE_DEFINE, (PREDEFINE_CACHE_TCM << PREDEF_1G_OFS) |
122 		      (PREDEFINE_CACHE << PREDEF_2G_OFS) | (PREDEFINE_CACHE << PREDEF_3G_OFS) |
123 		      (PREDEFINE_CACHE << PREDEF_4G_OFS));
124 
125 	spin_unlock(&apusys_rv_lock);
126 	return 0;
127 }
128 
129 int apusys_kernel_apusys_rv_start_mp(void)
130 {
131 	static bool apusys_rv_start_mp_called;
132 
133 	spin_lock(&apusys_rv_lock);
134 
135 	if (apusys_rv_start_mp_called) {
136 		WARN(MODULE_TAG "%s: already initialized\n", __func__);
137 		spin_unlock(&apusys_rv_lock);
138 		return -1;
139 	}
140 
141 	apusys_rv_start_mp_called = true;
142 
143 	mmio_write_32(MD32_RUNSTALL, MD32_RUN);
144 
145 	spin_unlock(&apusys_rv_lock);
146 
147 	return 0;
148 }
149 
150 static bool watch_dog_is_timeout(void)
151 {
152 	if (mmio_read_32(WDT_INT) != WDT_INT_W1C) {
153 		ERROR(MODULE_TAG "%s: WDT does not timeout\n", __func__);
154 		return false;
155 	}
156 	return true;
157 }
158 
159 int apusys_kernel_apusys_rv_stop_mp(void)
160 {
161 	static bool apusys_rv_stop_mp_called;
162 
163 	spin_lock(&apusys_rv_lock);
164 
165 	if (apusys_rv_stop_mp_called) {
166 		WARN(MODULE_TAG "%s: already initialized\n", __func__);
167 		spin_unlock(&apusys_rv_lock);
168 		return -1;
169 	}
170 
171 	if (watch_dog_is_timeout() == false) {
172 		spin_unlock(&apusys_rv_lock);
173 		return -1;
174 	}
175 
176 	apusys_rv_stop_mp_called = true;
177 
178 	mmio_write_32(MD32_RUNSTALL, MD32_STALL);
179 
180 	spin_unlock(&apusys_rv_lock);
181 
182 	return 0;
183 }
184