1 /* 2 * Copyright (c) 2023-2024, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef APUSYS_H 8 #define APUSYS_H 9 10 #define MODULE_TAG "[APUSYS]" 11 12 enum MTK_APUSYS_KERNEL_OP { 13 MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_ON, /* 0 */ 14 MTK_APUSYS_KERNEL_OP_APUSYS_PWR_TOP_OFF, /* 1 */ 15 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_REVISER, /* 2 */ 16 MTK_APUSYS_KERNEL_OP_APUSYS_RV_RESET_MP, /* 3 */ 17 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_BOOT, /* 4 */ 18 MTK_APUSYS_KERNEL_OP_APUSYS_RV_START_MP, /* 5 */ 19 MTK_APUSYS_KERNEL_OP_APUSYS_RV_STOP_MP, /* 6 */ 20 MTK_APUSYS_KERNEL_OP_DEVAPC_INIT_RCX, /* 7 */ 21 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_SEC_MEM, /* 8 */ 22 MTK_APUSYS_KERNEL_OP_APUSYS_RV_DISABLE_WDT_ISR, /* 9 */ 23 MTK_APUSYS_KERNEL_OP_APUSYS_RV_CLEAR_WDT_ISR, /* 10 */ 24 MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_GATING, /* 11 */ 25 MTK_APUSYS_KERNEL_OP_APUSYS_RV_CG_UNGATING, /* 12 */ 26 MTK_APUSYS_KERNEL_OP_APUSYS_RV_SETUP_APUMMU, /* 13 */ 27 MTK_APUSYS_KERNEL_OP_NUM, 28 }; 29 30 #endif 31