1cf906b2aSLeon Chen /* 2cf906b2aSLeon Chen * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3cf906b2aSLeon Chen * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5cf906b2aSLeon Chen */ 6cf906b2aSLeon Chen #include <arch_helpers.h> 7cf906b2aSLeon Chen #include <arm_gic.h> 8cf906b2aSLeon Chen #include <bl_common.h> 9cf906b2aSLeon Chen #include <cci.h> 10cf906b2aSLeon Chen #include <console.h> 11cf906b2aSLeon Chen #include <debug.h> 12cf906b2aSLeon Chen #include <mmio.h> 13cf906b2aSLeon Chen #include <mtk_plat_common.h> 14cf906b2aSLeon Chen #include <mtk_sip_svc.h> 15cf906b2aSLeon Chen #include <plat_private.h> 16*ee1ebbd1SIsla Mitchell #include <platform.h> 17cf906b2aSLeon Chen #include <xlat_tables.h> 18cf906b2aSLeon Chen 19cf906b2aSLeon Chen struct atf_arg_t gteearg; 20cf906b2aSLeon Chen 21cf906b2aSLeon Chen void clean_top_32b_of_param(uint32_t smc_fid, 22cf906b2aSLeon Chen uint64_t *px1, 23cf906b2aSLeon Chen uint64_t *px2, 24cf906b2aSLeon Chen uint64_t *px3, 25cf906b2aSLeon Chen uint64_t *px4) 26cf906b2aSLeon Chen { 27cf906b2aSLeon Chen /* if parameters from SMC32. Clean top 32 bits */ 28cf906b2aSLeon Chen if (0 == (smc_fid & SMC_AARCH64_BIT)) { 29cf906b2aSLeon Chen *px1 = *px1 & SMC32_PARAM_MASK; 30cf906b2aSLeon Chen *px2 = *px2 & SMC32_PARAM_MASK; 31cf906b2aSLeon Chen *px3 = *px3 & SMC32_PARAM_MASK; 32cf906b2aSLeon Chen *px4 = *px4 & SMC32_PARAM_MASK; 33cf906b2aSLeon Chen } 34cf906b2aSLeon Chen } 35cf906b2aSLeon Chen 36cf906b2aSLeon Chen #if MTK_SIP_KERNEL_BOOT_ENABLE 37cf906b2aSLeon Chen static struct kernel_info k_info; 38cf906b2aSLeon Chen 39cf906b2aSLeon Chen static void save_kernel_info(uint64_t pc, 40cf906b2aSLeon Chen uint64_t r0, 41cf906b2aSLeon Chen uint64_t r1, 42cf906b2aSLeon Chen uint64_t k32_64) 43cf906b2aSLeon Chen { 44cf906b2aSLeon Chen k_info.k32_64 = k32_64; 45cf906b2aSLeon Chen k_info.pc = pc; 46cf906b2aSLeon Chen 47cf906b2aSLeon Chen if (LINUX_KERNEL_32 == k32_64) { 48cf906b2aSLeon Chen /* for 32 bits kernel */ 49cf906b2aSLeon Chen k_info.r0 = 0; 50cf906b2aSLeon Chen /* machtype */ 51cf906b2aSLeon Chen k_info.r1 = r0; 52cf906b2aSLeon Chen /* tags */ 53cf906b2aSLeon Chen k_info.r2 = r1; 54cf906b2aSLeon Chen } else { 55cf906b2aSLeon Chen /* for 64 bits kernel */ 56cf906b2aSLeon Chen k_info.r0 = r0; 57cf906b2aSLeon Chen k_info.r1 = r1; 58cf906b2aSLeon Chen } 59cf906b2aSLeon Chen } 60cf906b2aSLeon Chen 61cf906b2aSLeon Chen uint64_t get_kernel_info_pc(void) 62cf906b2aSLeon Chen { 63cf906b2aSLeon Chen return k_info.pc; 64cf906b2aSLeon Chen } 65cf906b2aSLeon Chen 66cf906b2aSLeon Chen uint64_t get_kernel_info_r0(void) 67cf906b2aSLeon Chen { 68cf906b2aSLeon Chen return k_info.r0; 69cf906b2aSLeon Chen } 70cf906b2aSLeon Chen 71cf906b2aSLeon Chen uint64_t get_kernel_info_r1(void) 72cf906b2aSLeon Chen { 73cf906b2aSLeon Chen return k_info.r1; 74cf906b2aSLeon Chen } 75cf906b2aSLeon Chen 76cf906b2aSLeon Chen uint64_t get_kernel_info_r2(void) 77cf906b2aSLeon Chen { 78cf906b2aSLeon Chen return k_info.r2; 79cf906b2aSLeon Chen } 80cf906b2aSLeon Chen 81cf906b2aSLeon Chen void boot_to_kernel(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4) 82cf906b2aSLeon Chen { 83cf906b2aSLeon Chen static uint8_t kernel_boot_once_flag; 84cf906b2aSLeon Chen /* only support in booting flow */ 85cf906b2aSLeon Chen if (0 == kernel_boot_once_flag) { 86cf906b2aSLeon Chen kernel_boot_once_flag = 1; 87cf906b2aSLeon Chen 88cf906b2aSLeon Chen console_init(gteearg.atf_log_port, 89cf906b2aSLeon Chen UART_CLOCK, UART_BAUDRATE); 90cf906b2aSLeon Chen INFO("save kernel info\n"); 91cf906b2aSLeon Chen save_kernel_info(x1, x2, x3, x4); 92cf906b2aSLeon Chen bl31_prepare_kernel_entry(x4); 93cf906b2aSLeon Chen INFO("el3_exit\n"); 94cf906b2aSLeon Chen console_uninit(); 95cf906b2aSLeon Chen } 96cf906b2aSLeon Chen } 97cf906b2aSLeon Chen #endif 98cf906b2aSLeon Chen 99cf906b2aSLeon Chen uint32_t plat_get_spsr_for_bl33_entry(void) 100cf906b2aSLeon Chen { 101cf906b2aSLeon Chen unsigned int mode; 102cf906b2aSLeon Chen uint32_t spsr; 103cf906b2aSLeon Chen unsigned int ee; 104cf906b2aSLeon Chen unsigned long daif; 105cf906b2aSLeon Chen 106cf906b2aSLeon Chen INFO("Secondary bootloader is AArch32\n"); 107cf906b2aSLeon Chen mode = MODE32_svc; 108cf906b2aSLeon Chen ee = 0; 109cf906b2aSLeon Chen /* 110cf906b2aSLeon Chen * TODO: Choose async. exception bits if HYP mode is not 111cf906b2aSLeon Chen * implemented according to the values of SCR.{AW, FW} bits 112cf906b2aSLeon Chen */ 113cf906b2aSLeon Chen daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT; 114cf906b2aSLeon Chen 115cf906b2aSLeon Chen spsr = SPSR_MODE32(mode, 0, ee, daif); 116cf906b2aSLeon Chen return spsr; 117cf906b2aSLeon Chen } 118