1 /* 2 * Copyright (c) 2022, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <arch.h> 9 #include <common/bl_common.h> 10 #include <common/debug.h> 11 #include <drivers/delay_timer.h> 12 #include <drivers/generic_delay_timer.h> 13 #if XLAT_TABLES_LIB_V2 && PLAT_XLAT_TABLES_DYNAMIC 14 #include <lib/xlat_tables/xlat_tables_v2.h> 15 #endif 16 #include <plat/common/platform.h> 17 18 /* MTK headers */ 19 #if MTK_SIP_KERNEL_BOOT_ENABLE 20 #include <cold_boot.h> 21 #endif 22 #include <lib/mtk_init/mtk_init.h> 23 #include <mtk_mmap_pool.h> 24 25 IMPORT_SYM(uintptr_t, __RW_START__, RW_START); 26 IMPORT_SYM(uintptr_t, __DATA_START__, DATA_START); 27 #ifndef MTK_BL31_AS_BL2 28 static struct mtk_bl31_fw_config bl31_fw_config; 29 #else 30 struct mtk_bl31_fw_config bl31_fw_config; 31 #endif 32 /* In order to be accessed after MMU enable */ 33 static struct mtk_bl_param_t bl_param_clone; 34 35 void *get_mtk_bl31_fw_config(int index) 36 { 37 void *arg = NULL; 38 39 switch (index) { 40 case BOOT_ARG_FROM_BL2: 41 arg = bl31_fw_config.from_bl2; 42 break; 43 case BOOT_ARG_SOC_FW_CONFIG: 44 arg = bl31_fw_config.soc_fw_config; 45 break; 46 case BOOT_ARG_HW_CONFIG: 47 arg = bl31_fw_config.hw_config; 48 break; 49 case BOOT_ARG_RESERVED: 50 arg = bl31_fw_config.reserved; 51 break; 52 default: 53 WARN("Fail to get boot arg, index:%d", index); 54 break; 55 } 56 return arg; 57 } 58 59 /***************************************************************************** 60 * Perform the very early platform specific architectural setup shared between 61 * ARM standard platforms. This only does basic initialization. Later 62 * architectural setup (bl31_arch_setup()) does not do anything platform 63 * specific. 64 ******************************************************************************/ 65 void bl31_early_platform_setup2(u_register_t from_bl2, 66 u_register_t soc_fw_config, 67 u_register_t hw_config, u_register_t plat_params_from_bl2) 68 69 { 70 struct mtk_bl_param_t *p_mtk_bl_param = (struct mtk_bl_param_t *)from_bl2; 71 72 if (p_mtk_bl_param == NULL) { 73 ERROR("from_bl2 should not be NULL\n"); 74 panic(); 75 } 76 memcpy(&bl_param_clone, p_mtk_bl_param, sizeof(struct mtk_bl_param_t)); 77 bl31_fw_config.from_bl2 = (void *)&bl_param_clone; 78 bl31_fw_config.soc_fw_config = (void *)soc_fw_config; 79 bl31_fw_config.hw_config = (void *)hw_config; 80 bl31_fw_config.reserved = (void *)plat_params_from_bl2; 81 82 INFO("MTK BL31 start\n"); 83 /* Init delay function */ 84 generic_delay_timer_init(); 85 /* Initialize module initcall */ 86 mtk_init_one_level(MTK_INIT_LVL_EARLY_PLAT); 87 } 88 89 void bl31_plat_arch_setup(void) 90 { 91 const mmap_region_t bl_regions[] = { 92 MAP_BL_RO, 93 MAP_BL_RW, 94 #if USE_COHERENT_MEM 95 MAP_BL_COHERENT_RAM, 96 #endif 97 {0}, 98 }; 99 100 mtk_xlat_init(bl_regions); 101 /* Initialize module initcall */ 102 mtk_init_one_level(MTK_INIT_LVL_ARCH); 103 } 104 105 /***************************************************************************** 106 * Perform any BL31 platform setup common to ARM standard platforms 107 ******************************************************************************/ 108 109 void bl31_platform_setup(void) 110 { 111 mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_0); 112 mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_1); 113 } 114 115 /******************************************************************************* 116 * Operations before cold CPU leave BL31. 117 * Switch console to runtime state. 118 ******************************************************************************/ 119 void bl31_plat_runtime_setup(void) 120 { 121 mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME); 122 } 123 124 unsigned int plat_get_syscnt_freq2(void) 125 { 126 return SYS_COUNTER_FREQ_IN_HZ; 127 } 128