1394b9208SLeon Chen /* 29edf08b1SSalman Nabi * Copyright (c) 2022-2024, MediaTek Inc. All rights reserved. 3394b9208SLeon Chen * 4394b9208SLeon Chen * SPDX-License-Identifier: BSD-3-Clause 5394b9208SLeon Chen */ 6394b9208SLeon Chen 7394b9208SLeon Chen #include <assert.h> 8394b9208SLeon Chen #include <arch.h> 9394b9208SLeon Chen #include <common/bl_common.h> 10394b9208SLeon Chen #include <common/debug.h> 11394b9208SLeon Chen #include <drivers/delay_timer.h> 12394b9208SLeon Chen #include <drivers/generic_delay_timer.h> 13394b9208SLeon Chen #if XLAT_TABLES_LIB_V2 && PLAT_XLAT_TABLES_DYNAMIC 14394b9208SLeon Chen #include <lib/xlat_tables/xlat_tables_v2.h> 15394b9208SLeon Chen #endif 16394b9208SLeon Chen #include <plat/common/platform.h> 17394b9208SLeon Chen 18ef988aedSRex-BC Chen #if COREBOOT 19ef988aedSRex-BC Chen #include <common/desc_image_load.h> 20ef988aedSRex-BC Chen 21ef988aedSRex-BC Chen #include <drivers/ti/uart/uart_16550.h> 22ef988aedSRex-BC Chen #include <lib/coreboot.h> 23ef988aedSRex-BC Chen #include <plat_params.h> 24ef988aedSRex-BC Chen #endif 25ef988aedSRex-BC Chen 26394b9208SLeon Chen /* MTK headers */ 27*7794e7c0SVince Liu #if CONFIG_MTK_DISABLE_CACHE_AS_RAM 28*7794e7c0SVince Liu #include <cache_ops.h> 29*7794e7c0SVince Liu #endif 30394b9208SLeon Chen #if MTK_SIP_KERNEL_BOOT_ENABLE 31394b9208SLeon Chen #include <cold_boot.h> 32394b9208SLeon Chen #endif 33394b9208SLeon Chen #include <lib/mtk_init/mtk_init.h> 34394b9208SLeon Chen #include <mtk_mmap_pool.h> 35394b9208SLeon Chen 36394b9208SLeon Chen IMPORT_SYM(uintptr_t, __RW_START__, RW_START); 37394b9208SLeon Chen IMPORT_SYM(uintptr_t, __DATA_START__, DATA_START); 38ef988aedSRex-BC Chen 39ef988aedSRex-BC Chen #if COREBOOT 40ef988aedSRex-BC Chen static entry_point_info_t bl32_ep_info; 41ef988aedSRex-BC Chen static entry_point_info_t bl33_ep_info; 42ef988aedSRex-BC Chen 43ef988aedSRex-BC Chen /******************************************************************************* 44ef988aedSRex-BC Chen * Return a pointer to the 'entry_point_info' structure of the next image for 45ef988aedSRex-BC Chen * the security state specified. BL33 corresponds to the non-secure image type 46ef988aedSRex-BC Chen * while BL32 corresponds to the secure image type. A NULL pointer is returned 47ef988aedSRex-BC Chen * if the image does not exist. 48ef988aedSRex-BC Chen ******************************************************************************/ 49ef988aedSRex-BC Chen entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 50ef988aedSRex-BC Chen { 51ef988aedSRex-BC Chen entry_point_info_t *next_image_info; 52ef988aedSRex-BC Chen 53ef988aedSRex-BC Chen next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; 54ef988aedSRex-BC Chen assert(next_image_info->h.type == PARAM_EP); 55ef988aedSRex-BC Chen 56ef988aedSRex-BC Chen /* None of the images on this platform can have 0x0 as the entrypoint */ 57ef988aedSRex-BC Chen if (next_image_info->pc) { 58ef988aedSRex-BC Chen return next_image_info; 59ef988aedSRex-BC Chen } else { 60ef988aedSRex-BC Chen return NULL; 61ef988aedSRex-BC Chen } 62ef988aedSRex-BC Chen } 63ef988aedSRex-BC Chen #else 64394b9208SLeon Chen #ifndef MTK_BL31_AS_BL2 65394b9208SLeon Chen static struct mtk_bl31_fw_config bl31_fw_config; 66394b9208SLeon Chen #else 67394b9208SLeon Chen struct mtk_bl31_fw_config bl31_fw_config; 68394b9208SLeon Chen #endif 69394b9208SLeon Chen /* In order to be accessed after MMU enable */ 70394b9208SLeon Chen static struct mtk_bl_param_t bl_param_clone; 71394b9208SLeon Chen 72394b9208SLeon Chen void *get_mtk_bl31_fw_config(int index) 73394b9208SLeon Chen { 74394b9208SLeon Chen void *arg = NULL; 75394b9208SLeon Chen 76394b9208SLeon Chen switch (index) { 77394b9208SLeon Chen case BOOT_ARG_FROM_BL2: 78394b9208SLeon Chen arg = bl31_fw_config.from_bl2; 79394b9208SLeon Chen break; 80394b9208SLeon Chen case BOOT_ARG_SOC_FW_CONFIG: 81394b9208SLeon Chen arg = bl31_fw_config.soc_fw_config; 82394b9208SLeon Chen break; 83394b9208SLeon Chen case BOOT_ARG_HW_CONFIG: 84394b9208SLeon Chen arg = bl31_fw_config.hw_config; 85394b9208SLeon Chen break; 86394b9208SLeon Chen case BOOT_ARG_RESERVED: 87394b9208SLeon Chen arg = bl31_fw_config.reserved; 88394b9208SLeon Chen break; 89394b9208SLeon Chen default: 90394b9208SLeon Chen WARN("Fail to get boot arg, index:%d", index); 91394b9208SLeon Chen break; 92394b9208SLeon Chen } 93394b9208SLeon Chen return arg; 94394b9208SLeon Chen } 95ef988aedSRex-BC Chen #endif 96394b9208SLeon Chen /***************************************************************************** 97394b9208SLeon Chen * Perform the very early platform specific architectural setup shared between 98394b9208SLeon Chen * ARM standard platforms. This only does basic initialization. Later 99394b9208SLeon Chen * architectural setup (bl31_arch_setup()) does not do anything platform 100394b9208SLeon Chen * specific. 101394b9208SLeon Chen ******************************************************************************/ 102394b9208SLeon Chen void bl31_early_platform_setup2(u_register_t from_bl2, 103394b9208SLeon Chen u_register_t soc_fw_config, 104394b9208SLeon Chen u_register_t hw_config, u_register_t plat_params_from_bl2) 105394b9208SLeon Chen 106394b9208SLeon Chen { 107*7794e7c0SVince Liu #if CONFIG_MTK_DISABLE_CACHE_AS_RAM 108*7794e7c0SVince Liu disable_cache_as_ram(); 109*7794e7c0SVince Liu #endif 110ef988aedSRex-BC Chen #if COREBOOT 111ef988aedSRex-BC Chen static console_t console; 112ef988aedSRex-BC Chen 113ef988aedSRex-BC Chen params_early_setup(soc_fw_config); 114ef988aedSRex-BC Chen if (coreboot_serial.type) { 115ef988aedSRex-BC Chen console_16550_register(coreboot_serial.baseaddr, 116ef988aedSRex-BC Chen coreboot_serial.input_hertz, 117ef988aedSRex-BC Chen coreboot_serial.baud, 118ef988aedSRex-BC Chen &console); 119ef988aedSRex-BC Chen } 120ef988aedSRex-BC Chen bl31_params_parse_helper(from_bl2, &bl32_ep_info, &bl33_ep_info); 121ef988aedSRex-BC Chen #else 122394b9208SLeon Chen struct mtk_bl_param_t *p_mtk_bl_param = (struct mtk_bl_param_t *)from_bl2; 123394b9208SLeon Chen 124394b9208SLeon Chen if (p_mtk_bl_param == NULL) { 125394b9208SLeon Chen ERROR("from_bl2 should not be NULL\n"); 126394b9208SLeon Chen panic(); 127394b9208SLeon Chen } 128394b9208SLeon Chen memcpy(&bl_param_clone, p_mtk_bl_param, sizeof(struct mtk_bl_param_t)); 129394b9208SLeon Chen bl31_fw_config.from_bl2 = (void *)&bl_param_clone; 130394b9208SLeon Chen bl31_fw_config.soc_fw_config = (void *)soc_fw_config; 131394b9208SLeon Chen bl31_fw_config.hw_config = (void *)hw_config; 132394b9208SLeon Chen bl31_fw_config.reserved = (void *)plat_params_from_bl2; 133ef988aedSRex-BC Chen #endif 134394b9208SLeon Chen 135394b9208SLeon Chen INFO("MTK BL31 start\n"); 136394b9208SLeon Chen /* Init delay function */ 137394b9208SLeon Chen generic_delay_timer_init(); 138394b9208SLeon Chen /* Initialize module initcall */ 139394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_EARLY_PLAT); 140394b9208SLeon Chen } 141394b9208SLeon Chen 142394b9208SLeon Chen void bl31_plat_arch_setup(void) 143394b9208SLeon Chen { 144394b9208SLeon Chen const mmap_region_t bl_regions[] = { 145394b9208SLeon Chen MAP_BL_RO, 146394b9208SLeon Chen MAP_BL_RW, 147394b9208SLeon Chen #if USE_COHERENT_MEM 148394b9208SLeon Chen MAP_BL_COHERENT_RAM, 149394b9208SLeon Chen #endif 150394b9208SLeon Chen {0}, 151394b9208SLeon Chen }; 152394b9208SLeon Chen 153394b9208SLeon Chen mtk_xlat_init(bl_regions); 154394b9208SLeon Chen /* Initialize module initcall */ 155394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_ARCH); 156394b9208SLeon Chen } 157394b9208SLeon Chen 158394b9208SLeon Chen /***************************************************************************** 159394b9208SLeon Chen * Perform any BL31 platform setup common to ARM standard platforms 160394b9208SLeon Chen ******************************************************************************/ 161394b9208SLeon Chen 162394b9208SLeon Chen void bl31_platform_setup(void) 163394b9208SLeon Chen { 164394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_0); 165394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_1); 166394b9208SLeon Chen } 167394b9208SLeon Chen 168394b9208SLeon Chen /******************************************************************************* 169394b9208SLeon Chen * Operations before cold CPU leave BL31. 170394b9208SLeon Chen * Switch console to runtime state. 171394b9208SLeon Chen ******************************************************************************/ 172394b9208SLeon Chen void bl31_plat_runtime_setup(void) 173394b9208SLeon Chen { 174394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME); 175394b9208SLeon Chen } 176394b9208SLeon Chen 177394b9208SLeon Chen unsigned int plat_get_syscnt_freq2(void) 178394b9208SLeon Chen { 179394b9208SLeon Chen return SYS_COUNTER_FREQ_IN_HZ; 180394b9208SLeon Chen } 181