1*394b9208SLeon Chen /* 2*394b9208SLeon Chen * Copyright (c) 2022, MediaTek Inc. All rights reserved. 3*394b9208SLeon Chen * 4*394b9208SLeon Chen * SPDX-License-Identifier: BSD-3-Clause 5*394b9208SLeon Chen */ 6*394b9208SLeon Chen 7*394b9208SLeon Chen #include <assert.h> 8*394b9208SLeon Chen #include <arch.h> 9*394b9208SLeon Chen #include <common/bl_common.h> 10*394b9208SLeon Chen #include <common/debug.h> 11*394b9208SLeon Chen #include <drivers/delay_timer.h> 12*394b9208SLeon Chen #include <drivers/generic_delay_timer.h> 13*394b9208SLeon Chen #if XLAT_TABLES_LIB_V2 && PLAT_XLAT_TABLES_DYNAMIC 14*394b9208SLeon Chen #include <lib/xlat_tables/xlat_tables_v2.h> 15*394b9208SLeon Chen #endif 16*394b9208SLeon Chen #include <plat/common/platform.h> 17*394b9208SLeon Chen 18*394b9208SLeon Chen /* MTK headers */ 19*394b9208SLeon Chen #if MTK_SIP_KERNEL_BOOT_ENABLE 20*394b9208SLeon Chen #include <cold_boot.h> 21*394b9208SLeon Chen #endif 22*394b9208SLeon Chen #include <lib/mtk_init/mtk_init.h> 23*394b9208SLeon Chen #include <mtk_mmap_pool.h> 24*394b9208SLeon Chen 25*394b9208SLeon Chen IMPORT_SYM(uintptr_t, __RW_START__, RW_START); 26*394b9208SLeon Chen IMPORT_SYM(uintptr_t, __DATA_START__, DATA_START); 27*394b9208SLeon Chen #ifndef MTK_BL31_AS_BL2 28*394b9208SLeon Chen static struct mtk_bl31_fw_config bl31_fw_config; 29*394b9208SLeon Chen #else 30*394b9208SLeon Chen struct mtk_bl31_fw_config bl31_fw_config; 31*394b9208SLeon Chen #endif 32*394b9208SLeon Chen /* In order to be accessed after MMU enable */ 33*394b9208SLeon Chen static struct mtk_bl_param_t bl_param_clone; 34*394b9208SLeon Chen 35*394b9208SLeon Chen void *get_mtk_bl31_fw_config(int index) 36*394b9208SLeon Chen { 37*394b9208SLeon Chen void *arg = NULL; 38*394b9208SLeon Chen 39*394b9208SLeon Chen switch (index) { 40*394b9208SLeon Chen case BOOT_ARG_FROM_BL2: 41*394b9208SLeon Chen arg = bl31_fw_config.from_bl2; 42*394b9208SLeon Chen break; 43*394b9208SLeon Chen case BOOT_ARG_SOC_FW_CONFIG: 44*394b9208SLeon Chen arg = bl31_fw_config.soc_fw_config; 45*394b9208SLeon Chen break; 46*394b9208SLeon Chen case BOOT_ARG_HW_CONFIG: 47*394b9208SLeon Chen arg = bl31_fw_config.hw_config; 48*394b9208SLeon Chen break; 49*394b9208SLeon Chen case BOOT_ARG_RESERVED: 50*394b9208SLeon Chen arg = bl31_fw_config.reserved; 51*394b9208SLeon Chen break; 52*394b9208SLeon Chen default: 53*394b9208SLeon Chen WARN("Fail to get boot arg, index:%d", index); 54*394b9208SLeon Chen break; 55*394b9208SLeon Chen } 56*394b9208SLeon Chen return arg; 57*394b9208SLeon Chen } 58*394b9208SLeon Chen 59*394b9208SLeon Chen /***************************************************************************** 60*394b9208SLeon Chen * Perform the very early platform specific architectural setup shared between 61*394b9208SLeon Chen * ARM standard platforms. This only does basic initialization. Later 62*394b9208SLeon Chen * architectural setup (bl31_arch_setup()) does not do anything platform 63*394b9208SLeon Chen * specific. 64*394b9208SLeon Chen ******************************************************************************/ 65*394b9208SLeon Chen void bl31_early_platform_setup2(u_register_t from_bl2, 66*394b9208SLeon Chen u_register_t soc_fw_config, 67*394b9208SLeon Chen u_register_t hw_config, u_register_t plat_params_from_bl2) 68*394b9208SLeon Chen 69*394b9208SLeon Chen { 70*394b9208SLeon Chen struct mtk_bl_param_t *p_mtk_bl_param = (struct mtk_bl_param_t *)from_bl2; 71*394b9208SLeon Chen 72*394b9208SLeon Chen if (p_mtk_bl_param == NULL) { 73*394b9208SLeon Chen ERROR("from_bl2 should not be NULL\n"); 74*394b9208SLeon Chen panic(); 75*394b9208SLeon Chen } 76*394b9208SLeon Chen memcpy(&bl_param_clone, p_mtk_bl_param, sizeof(struct mtk_bl_param_t)); 77*394b9208SLeon Chen bl31_fw_config.from_bl2 = (void *)&bl_param_clone; 78*394b9208SLeon Chen bl31_fw_config.soc_fw_config = (void *)soc_fw_config; 79*394b9208SLeon Chen bl31_fw_config.hw_config = (void *)hw_config; 80*394b9208SLeon Chen bl31_fw_config.reserved = (void *)plat_params_from_bl2; 81*394b9208SLeon Chen 82*394b9208SLeon Chen INFO("MTK BL31 start\n"); 83*394b9208SLeon Chen /* Init delay function */ 84*394b9208SLeon Chen generic_delay_timer_init(); 85*394b9208SLeon Chen /* Initialize module initcall */ 86*394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_EARLY_PLAT); 87*394b9208SLeon Chen } 88*394b9208SLeon Chen 89*394b9208SLeon Chen void bl31_plat_arch_setup(void) 90*394b9208SLeon Chen { 91*394b9208SLeon Chen const mmap_region_t bl_regions[] = { 92*394b9208SLeon Chen MAP_BL_RO, 93*394b9208SLeon Chen MAP_BL_RW, 94*394b9208SLeon Chen #if USE_COHERENT_MEM 95*394b9208SLeon Chen MAP_BL_COHERENT_RAM, 96*394b9208SLeon Chen #endif 97*394b9208SLeon Chen {0}, 98*394b9208SLeon Chen }; 99*394b9208SLeon Chen 100*394b9208SLeon Chen mtk_xlat_init(bl_regions); 101*394b9208SLeon Chen /* Initialize module initcall */ 102*394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_ARCH); 103*394b9208SLeon Chen } 104*394b9208SLeon Chen 105*394b9208SLeon Chen /***************************************************************************** 106*394b9208SLeon Chen * Perform any BL31 platform setup common to ARM standard platforms 107*394b9208SLeon Chen ******************************************************************************/ 108*394b9208SLeon Chen 109*394b9208SLeon Chen void bl31_platform_setup(void) 110*394b9208SLeon Chen { 111*394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_0); 112*394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_PLAT_SETUP_1); 113*394b9208SLeon Chen } 114*394b9208SLeon Chen 115*394b9208SLeon Chen /******************************************************************************* 116*394b9208SLeon Chen * Operations before cold CPU leave BL31. 117*394b9208SLeon Chen * Switch console to runtime state. 118*394b9208SLeon Chen ******************************************************************************/ 119*394b9208SLeon Chen void bl31_plat_runtime_setup(void) 120*394b9208SLeon Chen { 121*394b9208SLeon Chen mtk_init_one_level(MTK_INIT_LVL_PLAT_RUNTIME); 122*394b9208SLeon Chen } 123*394b9208SLeon Chen 124*394b9208SLeon Chen unsigned int plat_get_syscnt_freq2(void) 125*394b9208SLeon Chen { 126*394b9208SLeon Chen return SYS_COUNTER_FREQ_IN_HZ; 127*394b9208SLeon Chen } 128