1500d40d8SLeon Chen# 2*a5520807SGavin Liu# Copyright (c) 2022-2025, MediaTek Inc. All rights reserved. 3500d40d8SLeon Chen# 4500d40d8SLeon Chen# SPDX-License-Identifier: BSD-3-Clause 5500d40d8SLeon Chen# 6500d40d8SLeon Chen 7500d40d8SLeon Chen# call add_defined_option to evaluate MTK defined value 8*a5520807SGavin LiuDEFINED_OPTIONS := \ 9*a5520807SGavin Liu CONFIG_MTK_CPU_PM_ARCH \ 10*a5520807SGavin Liu CONFIG_MTK_CPU_PM_SUPPORT \ 11*a5520807SGavin Liu CONFIG_MTK_CPU_SUSPEND_EN \ 12*a5520807SGavin Liu CONFIG_MTK_MCUSYS \ 13*a5520807SGavin Liu CONFIG_MTK_MTCMOS \ 14*a5520807SGavin Liu CONFIG_MTK_PM_ARCH \ 15*a5520807SGavin Liu CONFIG_MTK_PM_SUPPORT \ 16*a5520807SGavin Liu CONFIG_MTK_SMP_EN \ 17*a5520807SGavin Liu CONFIG_MTK_SUPPORT_SYSTEM_SUSPEND \ 18*a5520807SGavin Liu MTK_ADAPTED \ 19*a5520807SGavin Liu MTK_BL31_AS_BL2 \ 20*a5520807SGavin Liu MTK_BL33_IS_64BIT \ 21*a5520807SGavin Liu MTK_EXTRA_LINKERFILE \ 22*a5520807SGavin Liu MTK_PUBEVENT_ENABLE \ 23*a5520807SGavin Liu MTK_SIP_KERNEL_BOOT_ENABLE \ 24*a5520807SGavin Liu MTK_SOC \ 25*a5520807SGavin Liu PLAT_EXTRA_RODATA_INCLUDES \ 26*a5520807SGavin Liu PLAT_XLAT_TABLES_DYNAMIC \ 27*a5520807SGavin Liu UART_BAUDRATE \ 28*a5520807SGavin Liu UART_CLOCK 29*a5520807SGavin Liu 30*a5520807SGavin Liu$(foreach opt, $(DEFINED_OPTIONS),$(eval $(call add_defined_option,$(opt)))) 31