1500d40d8SLeon Chen# 2a5520807SGavin Liu# Copyright (c) 2022-2025, MediaTek Inc. All rights reserved. 3500d40d8SLeon Chen# 4500d40d8SLeon Chen# SPDX-License-Identifier: BSD-3-Clause 5500d40d8SLeon Chen# 6500d40d8SLeon Chen 7500d40d8SLeon Chen# call add_defined_option to evaluate MTK defined value 8a5520807SGavin LiuDEFINED_OPTIONS := \ 9a5520807SGavin Liu CONFIG_MTK_CPU_PM_ARCH \ 10a5520807SGavin Liu CONFIG_MTK_CPU_PM_SUPPORT \ 11a5520807SGavin Liu CONFIG_MTK_CPU_SUSPEND_EN \ 127794e7c0SVince Liu CONFIG_MTK_DISABLE_CACHE_AS_RAM \ 13a5520807SGavin Liu CONFIG_MTK_MCUSYS \ 14a5520807SGavin Liu CONFIG_MTK_MTCMOS \ 15a5520807SGavin Liu CONFIG_MTK_PM_ARCH \ 16a5520807SGavin Liu CONFIG_MTK_PM_SUPPORT \ 17*5be0e225SYidi Lin CONFIG_MTK_SMMU_SID \ 18a5520807SGavin Liu CONFIG_MTK_SMP_EN \ 19a5520807SGavin Liu CONFIG_MTK_SUPPORT_SYSTEM_SUSPEND \ 20a5520807SGavin Liu MTK_ADAPTED \ 21a5520807SGavin Liu MTK_BL31_AS_BL2 \ 22a5520807SGavin Liu MTK_BL33_IS_64BIT \ 23a5520807SGavin Liu MTK_EXTRA_LINKERFILE \ 24a5520807SGavin Liu MTK_PUBEVENT_ENABLE \ 25a5520807SGavin Liu MTK_SIP_KERNEL_BOOT_ENABLE \ 26a5520807SGavin Liu MTK_SOC \ 27a5520807SGavin Liu PLAT_EXTRA_RODATA_INCLUDES \ 28a5520807SGavin Liu PLAT_XLAT_TABLES_DYNAMIC \ 29a5520807SGavin Liu UART_BAUDRATE \ 30a5520807SGavin Liu UART_CLOCK 31a5520807SGavin Liu 32a5520807SGavin Liu$(foreach opt, $(DEFINED_OPTIONS),$(eval $(call add_defined_option,$(opt)))) 33