xref: /rk3399_ARM-atf/plat/marvell/armada/common/mrvl_sip_svc.c (revision b35ce0c413a71689a2b46453b9c30596128f13dc)
1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #include <common/debug.h>
9 #include <common/runtime_svc.h>
10 #include <drivers/marvell/cache_llc.h>
11 #include <drivers/marvell/mochi/ap_setup.h>
12 #include <drivers/rambus/trng_ip_76.h>
13 #include <lib/smccc.h>
14 
15 #include <marvell_plat_priv.h>
16 #include <plat_marvell.h>
17 
18 #include "comphy/phy-comphy-cp110.h"
19 #include <stdbool.h>
20 
21 /* #define DEBUG_COMPHY */
22 #ifdef DEBUG_COMPHY
23 #define debug(format...) NOTICE(format)
24 #else
25 #define debug(format, arg...)
26 #endif
27 
28 /* Comphy related FID's */
29 #define MV_SIP_COMPHY_POWER_ON	0x82000001
30 #define MV_SIP_COMPHY_POWER_OFF	0x82000002
31 #define MV_SIP_COMPHY_PLL_LOCK	0x82000003
32 #define MV_SIP_COMPHY_XFI_TRAIN	0x82000004
33 #define MV_SIP_COMPHY_DIG_RESET	0x82000005
34 
35 /* Miscellaneous FID's' */
36 #define MV_SIP_DRAM_SIZE	0x82000010
37 #define MV_SIP_LLC_ENABLE	0x82000011
38 #define MV_SIP_PMU_IRQ_ENABLE	0x82000012
39 #define MV_SIP_PMU_IRQ_DISABLE	0x82000013
40 
41 /* TRNG */
42 #define MV_SIP_RNG_64		0xC200FF11
43 
44 #define MAX_LANE_NR		6
45 #define MVEBU_COMPHY_OFFSET	0x441000
46 #define MVEBU_CP_BASE_MASK	(~0xffffff)
47 
48 /* This macro is used to identify COMPHY related calls from SMC function ID */
49 #define is_comphy_fid(fid)	\
50 	((fid) >= MV_SIP_COMPHY_POWER_ON && (fid) <= MV_SIP_COMPHY_DIG_RESET)
51 
52 _Bool is_cp_range_valid(u_register_t *addr)
53 {
54 	int cp_nr;
55 
56 	*addr &= MVEBU_CP_BASE_MASK;
57 	for (cp_nr = 0; cp_nr < CP_NUM; cp_nr++) {
58 		if (*addr == MVEBU_CP_REGS_BASE(cp_nr))
59 			return true;
60 	}
61 
62 	return false;
63 }
64 
65 uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid,
66 			       u_register_t x1,
67 			       u_register_t x2,
68 			       u_register_t x3,
69 			       u_register_t x4,
70 			       void *cookie,
71 			       void *handle,
72 			       u_register_t flags)
73 {
74 	u_register_t ret;
75 	uint32_t w2[2] = {0, 0};
76 	int i;
77 
78 	debug("%s: got SMC (0x%x) x1 0x%lx, x2 0x%lx, x3 0x%lx\n",
79 						 __func__, smc_fid, x1, x2, x3);
80 
81 	if (is_comphy_fid(smc_fid)) {
82 		/* validate address passed via x1 */
83 		if (!is_cp_range_valid(&x1)) {
84 			ERROR("%s: Wrong smc (0x%x) address: %lx\n",
85 			      __func__, smc_fid, x1);
86 			SMC_RET1(handle, SMC_UNK);
87 		}
88 
89 		x1 += MVEBU_COMPHY_OFFSET;
90 
91 		if (x2 >= MAX_LANE_NR) {
92 			ERROR("%s: Wrong smc (0x%x) lane nr: %lx\n",
93 			      __func__, smc_fid, x2);
94 			SMC_RET1(handle, SMC_UNK);
95 		}
96 	}
97 
98 	switch (smc_fid) {
99 
100 	/* Comphy related FID's */
101 	case MV_SIP_COMPHY_POWER_ON:
102 		/* x1:  comphy_base, x2: comphy_index, x3: comphy_mode */
103 		ret = mvebu_cp110_comphy_power_on(x1, x2, x3);
104 		SMC_RET1(handle, ret);
105 	case MV_SIP_COMPHY_POWER_OFF:
106 		/* x1:  comphy_base, x2: comphy_index */
107 		ret = mvebu_cp110_comphy_power_off(x1, x2, x3);
108 		SMC_RET1(handle, ret);
109 	case MV_SIP_COMPHY_PLL_LOCK:
110 		/* x1:  comphy_base, x2: comphy_index */
111 		ret = mvebu_cp110_comphy_is_pll_locked(x1, x2);
112 		SMC_RET1(handle, ret);
113 	case MV_SIP_COMPHY_XFI_TRAIN:
114 		/* x1:  comphy_base, x2: comphy_index */
115 		ret = mvebu_cp110_comphy_xfi_rx_training(x1, x2);
116 		SMC_RET1(handle, ret);
117 	case MV_SIP_COMPHY_DIG_RESET:
118 		/* x1:  comphy_base, x2: comphy_index, x3: mode, x4: command */
119 		ret = mvebu_cp110_comphy_digital_reset(x1, x2, x3, x4);
120 		SMC_RET1(handle, ret);
121 
122 	/* Miscellaneous FID's' */
123 	case MV_SIP_DRAM_SIZE:
124 		ret = mvebu_get_dram_size(MVEBU_REGS_BASE);
125 		SMC_RET1(handle, ret);
126 	case MV_SIP_LLC_ENABLE:
127 		for (i = 0; i < ap_get_count(); i++)
128 			llc_runtime_enable(i);
129 
130 		SMC_RET1(handle, 0);
131 #ifdef MVEBU_PMU_IRQ_WA
132 	case MV_SIP_PMU_IRQ_ENABLE:
133 		mvebu_pmu_interrupt_enable();
134 		SMC_RET1(handle, 0);
135 	case MV_SIP_PMU_IRQ_DISABLE:
136 		mvebu_pmu_interrupt_disable();
137 		SMC_RET1(handle, 0);
138 #endif
139 	case MV_SIP_RNG_64:
140 		ret = eip76_rng_get_random((uint8_t *)&w2, 4 * (x1 % 2 + 1));
141 		SMC_RET3(handle, ret, w2[0], w2[1]);
142 	default:
143 		ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
144 		SMC_RET1(handle, SMC_UNK);
145 	}
146 }
147 
148 /* Define a runtime service descriptor for fast SMC calls */
149 DECLARE_RT_SVC(
150 	marvell_sip_svc,
151 	OEN_SIP_START,
152 	OEN_SIP_END,
153 	SMC_TYPE_FAST,
154 	NULL,
155 	mrvl_sip_smc_handler
156 );
157