1 /* 2 * Copyright (C) 2018 Marvell International Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * https://spdx.org/licenses 6 */ 7 8 #include <assert.h> 9 #include <string.h> 10 11 #include <platform_def.h> 12 13 #include <arch_helpers.h> 14 #include <common/bl_common.h> 15 #include <common/debug.h> 16 #include <common/desc_image_load.h> 17 #include <drivers/console.h> 18 #include <lib/utils.h> 19 20 #ifdef SPD_opteed 21 #include <optee_utils.h> 22 #endif 23 #include <marvell_def.h> 24 #include <plat_marvell.h> 25 26 /* Data structure which holds the extents of the trusted SRAM for BL2 */ 27 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 28 29 /* Weak definitions may be overridden in specific MARVELL standard platform */ 30 #pragma weak bl2_early_platform_setup2 31 #pragma weak bl2_platform_setup 32 #pragma weak bl2_plat_arch_setup 33 #pragma weak bl2_plat_sec_mem_layout 34 35 meminfo_t *bl2_plat_sec_mem_layout(void) 36 { 37 return &bl2_tzram_layout; 38 } 39 40 /***************************************************************************** 41 * BL1 has passed the extents of the trusted SRAM that should be visible to BL2 42 * in x0. This memory layout is sitting at the base of the free trusted SRAM. 43 * Copy it to a safe location before its reclaimed by later BL2 functionality. 44 ***************************************************************************** 45 */ 46 void marvell_bl2_early_platform_setup(meminfo_t *mem_layout) 47 { 48 /* Initialize the console to provide early debug support */ 49 marvell_console_boot_init(); 50 51 /* Setup the BL2 memory layout */ 52 bl2_tzram_layout = *mem_layout; 53 54 /* Initialise the IO layer and register platform IO devices */ 55 plat_marvell_io_setup(); 56 } 57 58 59 void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, 60 u_register_t arg2, u_register_t arg3) 61 { 62 struct meminfo *mem_layout = (struct meminfo *)arg1; 63 64 marvell_bl2_early_platform_setup(mem_layout); 65 } 66 67 void bl2_platform_setup(void) 68 { 69 /* Nothing to do */ 70 } 71 72 /***************************************************************************** 73 * Perform the very early platform specific architectural setup here. At the 74 * moment this is only initializes the mmu in a quick and dirty way. 75 ***************************************************************************** 76 */ 77 void marvell_bl2_plat_arch_setup(void) 78 { 79 marvell_setup_page_tables(bl2_tzram_layout.total_base, 80 bl2_tzram_layout.total_size, 81 BL_CODE_BASE, 82 BL_CODE_END, 83 BL_RO_DATA_BASE, 84 BL_RO_DATA_END 85 #if USE_COHERENT_MEM 86 , BL_COHERENT_RAM_BASE, 87 BL_COHERENT_RAM_END 88 #endif 89 ); 90 enable_mmu_el1(0); 91 } 92 93 void bl2_plat_arch_setup(void) 94 { 95 marvell_bl2_plat_arch_setup(); 96 } 97 98 int marvell_bl2_handle_post_image_load(unsigned int image_id) 99 { 100 int err = 0; 101 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 102 103 #ifdef SPD_opteed 104 bl_mem_params_node_t *pager_mem_params = NULL; 105 bl_mem_params_node_t *paged_mem_params = NULL; 106 #endif /* SPD_opteed */ 107 assert(bl_mem_params); 108 109 switch (image_id) { 110 case BL32_IMAGE_ID: 111 #ifdef SPD_opteed 112 pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); 113 assert(pager_mem_params); 114 115 paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); 116 assert(paged_mem_params); 117 118 err = parse_optee_header(&bl_mem_params->ep_info, 119 &pager_mem_params->image_info, 120 &paged_mem_params->image_info); 121 if (err != 0) 122 WARN("OPTEE header parse error.\n"); 123 #endif /* SPD_opteed */ 124 bl_mem_params->ep_info.spsr = marvell_get_spsr_for_bl32_entry(); 125 break; 126 127 case BL33_IMAGE_ID: 128 /* BL33 expects to receive the primary CPU MPID (through r0) */ 129 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); 130 bl_mem_params->ep_info.spsr = marvell_get_spsr_for_bl33_entry(); 131 break; 132 #ifdef SCP_BL2_BASE 133 case SCP_BL2_IMAGE_ID: 134 /* The subsequent handling of SCP_BL2 is platform specific */ 135 err = bl2_plat_handle_scp_bl2(&bl_mem_params->image_info); 136 if (err) { 137 WARN("Failure in platform-specific handling of SCP_BL2 image.\n"); 138 } 139 break; 140 #endif 141 default: 142 /* Do nothing in default case */ 143 break; 144 } 145 146 return err; 147 148 } 149 150 /******************************************************************************* 151 * This function can be used by the platforms to update/use image 152 * information for given `image_id`. 153 ******************************************************************************/ 154 int bl2_plat_handle_post_image_load(unsigned int image_id) 155 { 156 return marvell_bl2_handle_post_image_load(image_id); 157 } 158 159