xref: /rk3399_ARM-atf/plat/marvell/armada/a3k/common/plat_cci.c (revision 1f64caeac896b805daf23ec3b6a8b3e406d2c89f)
1*b04921f7SMarek Behún /*
2*b04921f7SMarek Behún  * Copyright (C) 2021 Marek Behun <marek.behun@nic.cz>
3*b04921f7SMarek Behún  *
4*b04921f7SMarek Behún  * Based on plat/marvell/armada/common/marvell_cci.c
5*b04921f7SMarek Behún  *
6*b04921f7SMarek Behún  * SPDX-License-Identifier:     BSD-3-Clause
7*b04921f7SMarek Behún  * https://spdx.org/licenses
8*b04921f7SMarek Behún  */
9*b04921f7SMarek Behún 
10*b04921f7SMarek Behún #include <drivers/arm/cci.h>
11*b04921f7SMarek Behún #include <lib/mmio.h>
12*b04921f7SMarek Behún 
13*b04921f7SMarek Behún #include <plat_marvell.h>
14*b04921f7SMarek Behún 
15*b04921f7SMarek Behún static const int cci_map[] = {
16*b04921f7SMarek Behún 	PLAT_MARVELL_CCI_CLUSTER0_SL_IFACE_IX,
17*b04921f7SMarek Behún 	PLAT_MARVELL_CCI_CLUSTER1_SL_IFACE_IX
18*b04921f7SMarek Behún };
19*b04921f7SMarek Behún 
20*b04921f7SMarek Behún /*
21*b04921f7SMarek Behún  * This redefines the weak definition in
22*b04921f7SMarek Behún  * plat/marvell/armada/common/marvell_cci.c
23*b04921f7SMarek Behún  */
plat_marvell_interconnect_init(void)24*b04921f7SMarek Behún void plat_marvell_interconnect_init(void)
25*b04921f7SMarek Behún {
26*b04921f7SMarek Behún 	/*
27*b04921f7SMarek Behún 	 * To better utilize the address space, we remap CCI base address from
28*b04921f7SMarek Behún 	 * the default (0xD8000000) to MVEBU_CCI_BASE.
29*b04921f7SMarek Behún 	 * This has to be done here, rather than in cpu_wins_init(), because
30*b04921f7SMarek Behún 	 * cpu_wins_init() is called later.
31*b04921f7SMarek Behún 	 */
32*b04921f7SMarek Behún 	mmio_write_32(CPU_DEC_CCI_BASE_REG, MVEBU_CCI_BASE >> 20);
33*b04921f7SMarek Behún 
34*b04921f7SMarek Behún 	cci_init(PLAT_MARVELL_CCI_BASE, cci_map, ARRAY_SIZE(cci_map));
35*b04921f7SMarek Behún }
36