xref: /rk3399_ARM-atf/plat/intel/soc/stratix10/bl2_plat_setup.c (revision 5bd1b445a95eda5033d0f0d251d10c8417f08e4b)
19d82ef26SLoh Tien Hock /*
29d82ef26SLoh Tien Hock  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
39d82ef26SLoh Tien Hock  *
49d82ef26SLoh Tien Hock  * SPDX-License-Identifier: BSD-3-Clause
59d82ef26SLoh Tien Hock  */
69d82ef26SLoh Tien Hock 
79d82ef26SLoh Tien Hock #include <arch.h>
89d82ef26SLoh Tien Hock #include <arch_helpers.h>
99d82ef26SLoh Tien Hock #include <drivers/arm/gicv2.h>
109d82ef26SLoh Tien Hock 
119d82ef26SLoh Tien Hock #include <drivers/generic_delay_timer.h>
129d82ef26SLoh Tien Hock #include <drivers/console.h>
139d82ef26SLoh Tien Hock #include <drivers/ti/uart/uart_16550.h>
149d82ef26SLoh Tien Hock #include <common/bl_common.h>
159d82ef26SLoh Tien Hock #include <common/debug.h>
169d82ef26SLoh Tien Hock #include <common/desc_image_load.h>
179d82ef26SLoh Tien Hock #include <errno.h>
189d82ef26SLoh Tien Hock #include <drivers/io/io_storage.h>
199d82ef26SLoh Tien Hock #include <common/image_decompress.h>
209d82ef26SLoh Tien Hock #include <plat/common/platform.h>
219d82ef26SLoh Tien Hock #include <platform_def.h>
229d82ef26SLoh Tien Hock #include <platform_private.h>
239d82ef26SLoh Tien Hock #include <drivers/synopsys/dw_mmc.h>
249d82ef26SLoh Tien Hock #include <lib/mmio.h>
259d82ef26SLoh Tien Hock #include <lib/xlat_tables/xlat_tables.h>
269d82ef26SLoh Tien Hock 
279d82ef26SLoh Tien Hock #include "s10_memory_controller.h"
289d82ef26SLoh Tien Hock #include "s10_reset_manager.h"
299d82ef26SLoh Tien Hock #include "s10_clock_manager.h"
309d82ef26SLoh Tien Hock #include "s10_handoff.h"
319d82ef26SLoh Tien Hock #include "s10_pinmux.h"
329d82ef26SLoh Tien Hock #include "aarch64/stratix10_private.h"
339d82ef26SLoh Tien Hock 
349d82ef26SLoh Tien Hock const mmap_region_t plat_stratix10_mmap[] = {
35*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 	MAP_REGION_FLAT(DRAM_BASE, DRAM_SIZE,
36*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 		MT_MEMORY | MT_RW | MT_NS),
37*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 	MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
38*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 		MT_DEVICE | MT_RW | MT_NS),
39*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 	MAP_REGION_FLAT(DEVICE2_BASE, DEVICE2_SIZE,
40*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 		MT_DEVICE | MT_RW | MT_SECURE),
419d82ef26SLoh Tien Hock 	MAP_REGION_FLAT(OCRAM_BASE, OCRAM_SIZE,
429d82ef26SLoh Tien Hock 		MT_NON_CACHEABLE | MT_RW | MT_SECURE),
439d82ef26SLoh Tien Hock 	MAP_REGION_FLAT(DEVICE3_BASE, DEVICE3_SIZE,
449d82ef26SLoh Tien Hock 		MT_DEVICE | MT_RW | MT_SECURE),
45*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 	MAP_REGION_FLAT(MEM64_BASE, MEM64_SIZE,
46*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 		MT_DEVICE | MT_RW | MT_NS),
47*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 	MAP_REGION_FLAT(DEVICE4_BASE, DEVICE4_SIZE,
48*5bd1b445SMuhammad Hadi Asyrafi Abdul Halim 		MT_DEVICE | MT_RW | MT_NS),
499d82ef26SLoh Tien Hock 	{0},
509d82ef26SLoh Tien Hock };
519d82ef26SLoh Tien Hock 
529d82ef26SLoh Tien Hock boot_source_type boot_source;
539d82ef26SLoh Tien Hock 
549d82ef26SLoh Tien Hock void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
559d82ef26SLoh Tien Hock 				u_register_t x2, u_register_t x4)
569d82ef26SLoh Tien Hock {
579d82ef26SLoh Tien Hock 	static console_16550_t console;
589d82ef26SLoh Tien Hock 	handoff reverse_handoff_ptr;
599d82ef26SLoh Tien Hock 
609d82ef26SLoh Tien Hock 	generic_delay_timer_init();
619d82ef26SLoh Tien Hock 
629d82ef26SLoh Tien Hock 	if (s10_get_handoff(&reverse_handoff_ptr))
639d82ef26SLoh Tien Hock 		return;
649d82ef26SLoh Tien Hock 	config_pinmux(&reverse_handoff_ptr);
659d82ef26SLoh Tien Hock 	boot_source = reverse_handoff_ptr.boot_source;
669d82ef26SLoh Tien Hock 
679d82ef26SLoh Tien Hock 	config_clkmgr_handoff(&reverse_handoff_ptr);
689d82ef26SLoh Tien Hock 	enable_nonsecure_access();
699d82ef26SLoh Tien Hock 	deassert_peripheral_reset();
709d82ef26SLoh Tien Hock 	config_hps_hs_before_warm_reset();
719d82ef26SLoh Tien Hock 
729d82ef26SLoh Tien Hock 	console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE,
739d82ef26SLoh Tien Hock 		&console);
749d82ef26SLoh Tien Hock 
759d82ef26SLoh Tien Hock 	plat_delay_timer_init();
769d82ef26SLoh Tien Hock 	init_hard_memory_controller();
779d82ef26SLoh Tien Hock }
789d82ef26SLoh Tien Hock 
799d82ef26SLoh Tien Hock 
809d82ef26SLoh Tien Hock void bl2_el3_plat_arch_setup(void)
819d82ef26SLoh Tien Hock {
829d82ef26SLoh Tien Hock 
839d82ef26SLoh Tien Hock 	struct mmc_device_info info;
849d82ef26SLoh Tien Hock 	const mmap_region_t bl_regions[] = {
859d82ef26SLoh Tien Hock 		MAP_REGION_FLAT(BL2_BASE, BL2_END - BL2_BASE,
869d82ef26SLoh Tien Hock 			MT_MEMORY | MT_RW | MT_SECURE),
879d82ef26SLoh Tien Hock 		MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
889d82ef26SLoh Tien Hock 			MT_CODE | MT_SECURE),
899d82ef26SLoh Tien Hock 		MAP_REGION_FLAT(BL_RO_DATA_BASE,
909d82ef26SLoh Tien Hock 			BL_RO_DATA_END - BL_RO_DATA_BASE,
919d82ef26SLoh Tien Hock 			MT_RO_DATA | MT_SECURE),
929d82ef26SLoh Tien Hock #if USE_COHERENT_MEM_BAR
939d82ef26SLoh Tien Hock 		MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
949d82ef26SLoh Tien Hock 			BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
959d82ef26SLoh Tien Hock 			MT_DEVICE | MT_RW | MT_SECURE),
969d82ef26SLoh Tien Hock #endif
979d82ef26SLoh Tien Hock 		{0},
989d82ef26SLoh Tien Hock 	};
999d82ef26SLoh Tien Hock 
1009d82ef26SLoh Tien Hock 	setup_page_tables(bl_regions, plat_stratix10_mmap);
1019d82ef26SLoh Tien Hock 
1029d82ef26SLoh Tien Hock 	enable_mmu_el3(0);
1039d82ef26SLoh Tien Hock 
1049d82ef26SLoh Tien Hock 	dw_mmc_params_t params = EMMC_INIT_PARAMS(0x100000);
1059d82ef26SLoh Tien Hock 
1069d82ef26SLoh Tien Hock 	info.mmc_dev_type = MMC_IS_SD;
1079d82ef26SLoh Tien Hock 
1089d82ef26SLoh Tien Hock 	switch (boot_source) {
1099d82ef26SLoh Tien Hock 	case BOOT_SOURCE_SDMMC:
1109d82ef26SLoh Tien Hock 		dw_mmc_init(&params, &info);
1119d82ef26SLoh Tien Hock 		stratix10_io_setup();
1129d82ef26SLoh Tien Hock 		break;
1139d82ef26SLoh Tien Hock 	default:
1149d82ef26SLoh Tien Hock 		ERROR("Unsupported boot source\n");
1159d82ef26SLoh Tien Hock 		panic();
1169d82ef26SLoh Tien Hock 		break;
1179d82ef26SLoh Tien Hock 	}
1189d82ef26SLoh Tien Hock }
1199d82ef26SLoh Tien Hock 
1209d82ef26SLoh Tien Hock uint32_t get_spsr_for_bl33_entry(void)
1219d82ef26SLoh Tien Hock {
1229d82ef26SLoh Tien Hock 	unsigned long el_status;
1239d82ef26SLoh Tien Hock 	unsigned int mode;
1249d82ef26SLoh Tien Hock 	uint32_t spsr;
1259d82ef26SLoh Tien Hock 
1269d82ef26SLoh Tien Hock 	/* Figure out what mode we enter the non-secure world in */
1279d82ef26SLoh Tien Hock 	el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
1289d82ef26SLoh Tien Hock 	el_status &= ID_AA64PFR0_ELX_MASK;
1299d82ef26SLoh Tien Hock 
1309d82ef26SLoh Tien Hock 	mode = (el_status) ? MODE_EL2 : MODE_EL1;
1319d82ef26SLoh Tien Hock 
1329d82ef26SLoh Tien Hock 	/*
1339d82ef26SLoh Tien Hock 	 * TODO: Consider the possibility of specifying the SPSR in
1349d82ef26SLoh Tien Hock 	 * the FIP ToC and allowing the platform to have a say as
1359d82ef26SLoh Tien Hock 	 * well.
1369d82ef26SLoh Tien Hock 	 */
1379d82ef26SLoh Tien Hock 	spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
1389d82ef26SLoh Tien Hock 	return spsr;
1399d82ef26SLoh Tien Hock }
1409d82ef26SLoh Tien Hock 
1419d82ef26SLoh Tien Hock 
1429d82ef26SLoh Tien Hock int bl2_plat_handle_post_image_load(unsigned int image_id)
1439d82ef26SLoh Tien Hock {
1449d82ef26SLoh Tien Hock 	bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
1459d82ef26SLoh Tien Hock 
1469d82ef26SLoh Tien Hock 	switch (image_id) {
1479d82ef26SLoh Tien Hock 	case BL33_IMAGE_ID:
1489d82ef26SLoh Tien Hock 		bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
1499d82ef26SLoh Tien Hock 		bl_mem_params->ep_info.spsr = get_spsr_for_bl33_entry();
1509d82ef26SLoh Tien Hock 		break;
1519d82ef26SLoh Tien Hock 	default:
1529d82ef26SLoh Tien Hock 		break;
1539d82ef26SLoh Tien Hock 	}
1549d82ef26SLoh Tien Hock 
1559d82ef26SLoh Tien Hock 	return 0;
1569d82ef26SLoh Tien Hock }
1579d82ef26SLoh Tien Hock 
1589d82ef26SLoh Tien Hock /*******************************************************************************
1599d82ef26SLoh Tien Hock  * Perform any BL3-1 platform setup code
1609d82ef26SLoh Tien Hock  ******************************************************************************/
1619d82ef26SLoh Tien Hock void bl2_platform_setup(void)
1629d82ef26SLoh Tien Hock {
1639d82ef26SLoh Tien Hock }
1649d82ef26SLoh Tien Hock 
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