xref: /rk3399_ARM-atf/plat/intel/soc/common/socfpga_storage.c (revision 6197dc98feba98c3e123256424d2d33d5de997b8)
1e9b5e360SHadi Asyrafi /*
2e9b5e360SHadi Asyrafi  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3*6197dc98SJit Loon Lim  * Copyright (c) 2019-2023, Intel Corporation. All rights reserved.
4e9b5e360SHadi Asyrafi  *
5e9b5e360SHadi Asyrafi  * SPDX-License-Identifier: BSD-3-Clause
6e9b5e360SHadi Asyrafi  */
7e9b5e360SHadi Asyrafi 
8e9b5e360SHadi Asyrafi #include <arch_helpers.h>
9e9b5e360SHadi Asyrafi #include <assert.h>
10e9b5e360SHadi Asyrafi #include <common/debug.h>
11e9b5e360SHadi Asyrafi #include <common/tbbr/tbbr_img_def.h>
12e9b5e360SHadi Asyrafi #include <drivers/io/io_block.h>
13e9b5e360SHadi Asyrafi #include <drivers/io/io_driver.h>
14e9b5e360SHadi Asyrafi #include <drivers/io/io_fip.h>
15e9b5e360SHadi Asyrafi #include <drivers/io/io_memmap.h>
16e9b5e360SHadi Asyrafi #include <drivers/io/io_storage.h>
17e9b5e360SHadi Asyrafi #include <drivers/mmc.h>
18e9b5e360SHadi Asyrafi #include <drivers/partition/partition.h>
19e9b5e360SHadi Asyrafi #include <lib/mmio.h>
20e9b5e360SHadi Asyrafi #include <tools_share/firmware_image_package.h>
21e9b5e360SHadi Asyrafi 
22e9b5e360SHadi Asyrafi #include "socfpga_private.h"
23e9b5e360SHadi Asyrafi 
24e9b5e360SHadi Asyrafi #define PLAT_FIP_BASE		(0)
25e9b5e360SHadi Asyrafi #define PLAT_FIP_MAX_SIZE	(0x1000000)
26e9b5e360SHadi Asyrafi #define PLAT_MMC_DATA_BASE	(0xffe3c000)
27e9b5e360SHadi Asyrafi #define PLAT_MMC_DATA_SIZE	(0x2000)
28e9b5e360SHadi Asyrafi #define PLAT_QSPI_DATA_BASE	(0x3C00000)
29e9b5e360SHadi Asyrafi #define PLAT_QSPI_DATA_SIZE	(0x1000000)
30e9b5e360SHadi Asyrafi 
31e9b5e360SHadi Asyrafi 
32e9b5e360SHadi Asyrafi static const io_dev_connector_t *fip_dev_con;
33e9b5e360SHadi Asyrafi static const io_dev_connector_t *boot_dev_con;
34e9b5e360SHadi Asyrafi 
35e9b5e360SHadi Asyrafi static uintptr_t fip_dev_handle;
36e9b5e360SHadi Asyrafi static uintptr_t boot_dev_handle;
37e9b5e360SHadi Asyrafi 
38e9b5e360SHadi Asyrafi static const io_uuid_spec_t bl2_uuid_spec = {
39e9b5e360SHadi Asyrafi 	.uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2,
40e9b5e360SHadi Asyrafi };
41e9b5e360SHadi Asyrafi 
42e9b5e360SHadi Asyrafi static const io_uuid_spec_t bl31_uuid_spec = {
43e9b5e360SHadi Asyrafi 	.uuid = UUID_EL3_RUNTIME_FIRMWARE_BL31,
44e9b5e360SHadi Asyrafi };
45e9b5e360SHadi Asyrafi 
46e9b5e360SHadi Asyrafi static const io_uuid_spec_t bl33_uuid_spec = {
47e9b5e360SHadi Asyrafi 	.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
48e9b5e360SHadi Asyrafi };
49e9b5e360SHadi Asyrafi 
50e9b5e360SHadi Asyrafi uintptr_t a2_lba_offset;
51e9b5e360SHadi Asyrafi const char a2[] = {0xa2, 0x0};
52e9b5e360SHadi Asyrafi 
53e9b5e360SHadi Asyrafi static const io_block_spec_t gpt_block_spec = {
54e9b5e360SHadi Asyrafi 	.offset = 0,
55e9b5e360SHadi Asyrafi 	.length = MMC_BLOCK_SIZE
56e9b5e360SHadi Asyrafi };
57e9b5e360SHadi Asyrafi 
58e9b5e360SHadi Asyrafi static int check_fip(const uintptr_t spec);
59e9b5e360SHadi Asyrafi static int check_dev(const uintptr_t spec);
60e9b5e360SHadi Asyrafi 
61e9b5e360SHadi Asyrafi static io_block_dev_spec_t boot_dev_spec;
62e9b5e360SHadi Asyrafi static int (*register_io_dev)(const io_dev_connector_t **);
63e9b5e360SHadi Asyrafi 
64e9b5e360SHadi Asyrafi static io_block_spec_t fip_spec = {
65e9b5e360SHadi Asyrafi 	.offset		= PLAT_FIP_BASE,
66e9b5e360SHadi Asyrafi 	.length		= PLAT_FIP_MAX_SIZE,
67e9b5e360SHadi Asyrafi };
68e9b5e360SHadi Asyrafi 
69e9b5e360SHadi Asyrafi struct plat_io_policy {
70e9b5e360SHadi Asyrafi 	uintptr_t       *dev_handle;
71e9b5e360SHadi Asyrafi 	uintptr_t       image_spec;
72e9b5e360SHadi Asyrafi 	int             (*check)(const uintptr_t spec);
73e9b5e360SHadi Asyrafi };
74e9b5e360SHadi Asyrafi 
75e9b5e360SHadi Asyrafi static const struct plat_io_policy policies[] = {
76e9b5e360SHadi Asyrafi 	[FIP_IMAGE_ID] = {
77e9b5e360SHadi Asyrafi 		&boot_dev_handle,
78e9b5e360SHadi Asyrafi 		(uintptr_t)&fip_spec,
79e9b5e360SHadi Asyrafi 		check_dev
80e9b5e360SHadi Asyrafi 	},
81e9b5e360SHadi Asyrafi 	[BL2_IMAGE_ID] = {
82e9b5e360SHadi Asyrafi 	  &fip_dev_handle,
83e9b5e360SHadi Asyrafi 	  (uintptr_t)&bl2_uuid_spec,
84e9b5e360SHadi Asyrafi 	  check_fip
85e9b5e360SHadi Asyrafi 	},
86e9b5e360SHadi Asyrafi 	[BL31_IMAGE_ID] = {
87e9b5e360SHadi Asyrafi 		&fip_dev_handle,
88e9b5e360SHadi Asyrafi 		(uintptr_t)&bl31_uuid_spec,
89e9b5e360SHadi Asyrafi 		check_fip
90e9b5e360SHadi Asyrafi 	},
91e9b5e360SHadi Asyrafi 	[BL33_IMAGE_ID] = {
92e9b5e360SHadi Asyrafi 		&fip_dev_handle,
93e9b5e360SHadi Asyrafi 		(uintptr_t) &bl33_uuid_spec,
94e9b5e360SHadi Asyrafi 		check_fip
95e9b5e360SHadi Asyrafi 	},
96e9b5e360SHadi Asyrafi 	[GPT_IMAGE_ID] = {
97e9b5e360SHadi Asyrafi 		&boot_dev_handle,
98e9b5e360SHadi Asyrafi 		(uintptr_t) &gpt_block_spec,
99e9b5e360SHadi Asyrafi 		check_dev
100e9b5e360SHadi Asyrafi 	},
101e9b5e360SHadi Asyrafi };
102e9b5e360SHadi Asyrafi 
103e9b5e360SHadi Asyrafi static int check_dev(const uintptr_t spec)
104e9b5e360SHadi Asyrafi {
105e9b5e360SHadi Asyrafi 	int result;
106e9b5e360SHadi Asyrafi 	uintptr_t local_handle;
107e9b5e360SHadi Asyrafi 
108e9b5e360SHadi Asyrafi 	result = io_dev_init(boot_dev_handle, (uintptr_t)NULL);
109e9b5e360SHadi Asyrafi 	if (result == 0) {
110e9b5e360SHadi Asyrafi 		result = io_open(boot_dev_handle, spec, &local_handle);
111e9b5e360SHadi Asyrafi 		if (result == 0)
112e9b5e360SHadi Asyrafi 			io_close(local_handle);
113e9b5e360SHadi Asyrafi 	}
114e9b5e360SHadi Asyrafi 	return result;
115e9b5e360SHadi Asyrafi }
116e9b5e360SHadi Asyrafi 
117e9b5e360SHadi Asyrafi static int check_fip(const uintptr_t spec)
118e9b5e360SHadi Asyrafi {
119e9b5e360SHadi Asyrafi 	int result;
120e9b5e360SHadi Asyrafi 	uintptr_t local_image_handle;
121e9b5e360SHadi Asyrafi 
122e9b5e360SHadi Asyrafi 	result = io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID);
123e9b5e360SHadi Asyrafi 	if (result == 0) {
124e9b5e360SHadi Asyrafi 		result = io_open(fip_dev_handle, spec, &local_image_handle);
125e9b5e360SHadi Asyrafi 		if (result == 0)
126e9b5e360SHadi Asyrafi 			io_close(local_image_handle);
127e9b5e360SHadi Asyrafi 	}
128e9b5e360SHadi Asyrafi 	return result;
129e9b5e360SHadi Asyrafi }
130e9b5e360SHadi Asyrafi 
131e9b5e360SHadi Asyrafi void socfpga_io_setup(int boot_source)
132e9b5e360SHadi Asyrafi {
133e9b5e360SHadi Asyrafi 	int result;
134e9b5e360SHadi Asyrafi 
135e9b5e360SHadi Asyrafi 	switch (boot_source) {
136e9b5e360SHadi Asyrafi 	case BOOT_SOURCE_SDMMC:
137e9b5e360SHadi Asyrafi 		register_io_dev = &register_io_dev_block;
138e9b5e360SHadi Asyrafi 		boot_dev_spec.buffer.offset	= PLAT_MMC_DATA_BASE;
139e9b5e360SHadi Asyrafi 		boot_dev_spec.buffer.length	= MMC_BLOCK_SIZE;
140e9b5e360SHadi Asyrafi 		boot_dev_spec.ops.read		= mmc_read_blocks;
141e9b5e360SHadi Asyrafi 		boot_dev_spec.ops.write		= mmc_write_blocks;
142e9b5e360SHadi Asyrafi 		boot_dev_spec.block_size	= MMC_BLOCK_SIZE;
143e9b5e360SHadi Asyrafi 		break;
144e9b5e360SHadi Asyrafi 
145e9b5e360SHadi Asyrafi 	case BOOT_SOURCE_QSPI:
146e9b5e360SHadi Asyrafi 		register_io_dev = &register_io_dev_memmap;
147e9b5e360SHadi Asyrafi 		fip_spec.offset = fip_spec.offset + PLAT_QSPI_DATA_BASE;
148e9b5e360SHadi Asyrafi 		break;
149e9b5e360SHadi Asyrafi 
150e9b5e360SHadi Asyrafi 	default:
151e9b5e360SHadi Asyrafi 		ERROR("Unsupported boot source\n");
152e9b5e360SHadi Asyrafi 		panic();
153e9b5e360SHadi Asyrafi 		break;
154e9b5e360SHadi Asyrafi 	}
155e9b5e360SHadi Asyrafi 
156e9b5e360SHadi Asyrafi 	result = (*register_io_dev)(&boot_dev_con);
157e9b5e360SHadi Asyrafi 	assert(result == 0);
158e9b5e360SHadi Asyrafi 
159e9b5e360SHadi Asyrafi 	result = register_io_dev_fip(&fip_dev_con);
160e9b5e360SHadi Asyrafi 	assert(result == 0);
161e9b5e360SHadi Asyrafi 
162e9b5e360SHadi Asyrafi 	result = io_dev_open(boot_dev_con, (uintptr_t)&boot_dev_spec,
163e9b5e360SHadi Asyrafi 			&boot_dev_handle);
164e9b5e360SHadi Asyrafi 	assert(result == 0);
165e9b5e360SHadi Asyrafi 
166e9b5e360SHadi Asyrafi 	result = io_dev_open(fip_dev_con, (uintptr_t)NULL, &fip_dev_handle);
167e9b5e360SHadi Asyrafi 	assert(result == 0);
168e9b5e360SHadi Asyrafi 
169e9b5e360SHadi Asyrafi 	if (boot_source == BOOT_SOURCE_SDMMC) {
170e9b5e360SHadi Asyrafi 		partition_init(GPT_IMAGE_ID);
171e9b5e360SHadi Asyrafi 		fip_spec.offset = get_partition_entry(a2)->start;
172e9b5e360SHadi Asyrafi 	}
173e9b5e360SHadi Asyrafi 
174e9b5e360SHadi Asyrafi 	(void)result;
175e9b5e360SHadi Asyrafi }
176e9b5e360SHadi Asyrafi 
177e9b5e360SHadi Asyrafi int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
178e9b5e360SHadi Asyrafi 			uintptr_t *image_spec)
179e9b5e360SHadi Asyrafi {
180e9b5e360SHadi Asyrafi 	int result;
181e9b5e360SHadi Asyrafi 	const struct plat_io_policy *policy;
182e9b5e360SHadi Asyrafi 
183e9b5e360SHadi Asyrafi 	assert(image_id < ARRAY_SIZE(policies));
184e9b5e360SHadi Asyrafi 
185e9b5e360SHadi Asyrafi 	policy = &policies[image_id];
186e9b5e360SHadi Asyrafi 	result = policy->check(policy->image_spec);
187e9b5e360SHadi Asyrafi 	assert(result == 0);
188e9b5e360SHadi Asyrafi 
189e9b5e360SHadi Asyrafi 	*image_spec = policy->image_spec;
190e9b5e360SHadi Asyrafi 	*dev_handle = *(policy->dev_handle);
191e9b5e360SHadi Asyrafi 
192e9b5e360SHadi Asyrafi 	return result;
193e9b5e360SHadi Asyrafi }
194