1 /* 2 * Copyright (c) 2022-2023, Intel Corporation. All rights reserved. 3 * Copyright (c) 2024-2025, Altera Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 #include <common/debug.h> 10 #include <common/runtime_svc.h> 11 #include <lib/mmio.h> 12 13 #include "lib/utils/alignment_utils.h" 14 #include "socfpga_mailbox.h" 15 #include "socfpga_sip_svc.h" 16 17 static uint32_t intel_v2_mbox_send_cmd(uint32_t req_header, 18 uint32_t *data, uint32_t data_size) 19 { 20 uint32_t value; 21 uint32_t len; 22 23 if ((data == NULL) || (data_size == 0)) { 24 return INTEL_SIP_SMC_STATUS_REJECTED; 25 } 26 27 if (data_size > (MBOX_INC_HEADER_MAX_WORD_SIZE * MBOX_WORD_BYTE)) { 28 return INTEL_SIP_SMC_STATUS_REJECTED; 29 } 30 31 if (!is_size_4_bytes_aligned(data_size)) { 32 return INTEL_SIP_SMC_STATUS_REJECTED; 33 } 34 35 /* Make sure client id align in SMC SiP V2 header and mailbox header */ 36 value = (req_header >> INTEL_SIP_SMC_HEADER_CID_OFFSET) & 37 INTEL_SIP_SMC_HEADER_CID_MASK; 38 39 if (value != MBOX_RESP_CLIENT_ID(data[0])) { 40 return INTEL_SIP_SMC_STATUS_REJECTED; 41 } 42 43 /* Make sure job id align in SMC SiP V2 header and mailbox header */ 44 value = (req_header >> INTEL_SIP_SMC_HEADER_JOB_ID_OFFSET) & 45 INTEL_SIP_SMC_HEADER_JOB_ID_MASK; 46 47 if (value != MBOX_RESP_JOB_ID(data[0])) { 48 return INTEL_SIP_SMC_STATUS_REJECTED; 49 } 50 51 /* 52 * Make sure data length align in SMC SiP V2 header and 53 * mailbox header 54 */ 55 len = (data_size / MBOX_WORD_BYTE) - 1; 56 57 if (len != MBOX_RESP_LEN(data[0])) { 58 return INTEL_SIP_SMC_STATUS_REJECTED; 59 } 60 61 return mailbox_send_cmd_async_ext(data[0], &data[1], len); 62 } 63 64 static uint32_t intel_v2_mbox_poll_resp(uint64_t req_header, 65 uint32_t *data, uint32_t *data_size, 66 uint64_t *resp_header) 67 { 68 int status = 0; 69 uint32_t resp_len; 70 uint32_t job_id = 0; 71 uint32_t client_id = 0; 72 uint32_t version; 73 74 if ((data == NULL) || (data_size == NULL) || (resp_header == NULL)) { 75 return INTEL_SIP_SMC_STATUS_REJECTED; 76 } 77 78 if (!is_size_4_bytes_aligned(*data_size)) { 79 return INTEL_SIP_SMC_STATUS_REJECTED; 80 } 81 82 resp_len = (*data_size / MBOX_WORD_BYTE) - 1; 83 status = mailbox_read_response_async(&job_id, &data[0], &data[1], 84 &resp_len, 1); 85 86 if (status == MBOX_BUSY) { 87 status = INTEL_SIP_SMC_STATUS_BUSY; 88 } else if (status == MBOX_NO_RESPONSE) { 89 status = INTEL_SIP_SMC_STATUS_NO_RESPONSE; 90 } else { 91 *data_size = 0; 92 93 if (resp_len > 0) { 94 /* 95 * Fill in the final response length, 96 * the length include both mailbox header and payload 97 */ 98 *data_size = (resp_len + 1) * MBOX_WORD_BYTE; 99 100 /* Extract the client id from mailbox header */ 101 client_id = MBOX_RESP_CLIENT_ID(data[0]); 102 } 103 104 /* 105 * Extract SMC SiP V2 protocol version from 106 * SMC request header 107 */ 108 version = (req_header >> INTEL_SIP_SMC_HEADER_VERSION_OFFSET) & 109 INTEL_SIP_SMC_HEADER_VERSION_MASK; 110 111 /* Fill in SMC SiP V2 protocol response header */ 112 *resp_header = 0; 113 *resp_header |= (((uint64_t)job_id) & 114 INTEL_SIP_SMC_HEADER_JOB_ID_MASK) << 115 INTEL_SIP_SMC_HEADER_JOB_ID_OFFSET; 116 *resp_header |= (((uint64_t)client_id) & 117 INTEL_SIP_SMC_HEADER_CID_MASK) << 118 INTEL_SIP_SMC_HEADER_CID_OFFSET; 119 *resp_header |= (((uint64_t)version) & 120 INTEL_SIP_SMC_HEADER_VERSION_MASK) << 121 INTEL_SIP_SMC_HEADER_VERSION_OFFSET; 122 } 123 124 return status; 125 } 126 127 uintptr_t sip_smc_handler_v2(uint32_t smc_fid, 128 u_register_t x1, 129 u_register_t x2, 130 u_register_t x3, 131 u_register_t x4, 132 void *cookie, 133 void *handle, 134 u_register_t flags) 135 { 136 uint32_t retval = 0; 137 uint64_t retval64 = 0; 138 int status = INTEL_SIP_SMC_STATUS_OK; 139 140 switch (smc_fid) { 141 case INTEL_SIP_SMC_V2_GET_SVC_VERSION: 142 SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, x1, 143 SIP_SVC_VERSION_MAJOR, 144 SIP_SVC_VERSION_MINOR); 145 146 case INTEL_SIP_SMC_V2_REG_READ: 147 status = intel_secure_reg_read(x2, &retval); 148 SMC_RET4(handle, status, x1, retval, x2); 149 150 case INTEL_SIP_SMC_V2_REG_WRITE: 151 status = intel_secure_reg_write(x2, (uint32_t)x3, &retval); 152 SMC_RET4(handle, status, x1, retval, x2); 153 154 case INTEL_SIP_SMC_V2_REG_UPDATE: 155 status = intel_secure_reg_update(x2, (uint32_t)x3, 156 (uint32_t)x4, &retval); 157 SMC_RET4(handle, status, x1, retval, x2); 158 159 case INTEL_SIP_SMC_V2_HPS_SET_BRIDGES: 160 status = intel_hps_set_bridges(x2, x3); 161 SMC_RET2(handle, status, x1); 162 163 case INTEL_SIP_SMC_V2_RSU_UPDATE_ADDR: 164 status = intel_rsu_update(x2); 165 SMC_RET2(handle, status, x1); 166 167 case INTEL_SIP_SMC_V2_MAILBOX_SEND_COMMAND: 168 status = intel_v2_mbox_send_cmd(x1, (uint32_t *)x2, x3); 169 SMC_RET2(handle, status, x1); 170 171 case INTEL_SIP_SMC_V2_MAILBOX_POLL_RESPONSE: 172 status = intel_v2_mbox_poll_resp(x1, (uint32_t *)x2, 173 (uint32_t *) &x3, &retval64); 174 SMC_RET4(handle, status, retval64, x2, x3); 175 176 default: 177 ERROR("%s: unhandled SMC V2 (0x%x)\n", __func__, smc_fid); 178 SMC_RET1(handle, SMC_UNK); 179 } 180 } 181