1 /* 2 * Copyright (c) 2020-2022, Intel Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <lib/mmio.h> 9 10 #include "socfpga_fcs.h" 11 #include "socfpga_mailbox.h" 12 #include "socfpga_sip_svc.h" 13 14 static bool is_size_4_bytes_aligned(uint32_t size) 15 { 16 if ((size % MBOX_WORD_BYTE) != 0U) { 17 return false; 18 } else { 19 return true; 20 } 21 } 22 23 uint32_t intel_fcs_random_number_gen(uint64_t addr, uint64_t *ret_size, 24 uint32_t *mbox_error) 25 { 26 int status; 27 unsigned int i; 28 unsigned int resp_len = FCS_RANDOM_WORD_SIZE; 29 uint32_t random_data[FCS_RANDOM_WORD_SIZE] = {0U}; 30 31 if (!is_address_in_ddr_range(addr, FCS_RANDOM_BYTE_SIZE)) { 32 return INTEL_SIP_SMC_STATUS_REJECTED; 33 } 34 35 status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_FCS_RANDOM_GEN, NULL, 0U, 36 CMD_CASUAL, random_data, &resp_len); 37 38 if (status < 0) { 39 *mbox_error = -status; 40 return INTEL_SIP_SMC_STATUS_ERROR; 41 } 42 43 if (resp_len != FCS_RANDOM_WORD_SIZE) { 44 *mbox_error = GENERIC_RESPONSE_ERROR; 45 return INTEL_SIP_SMC_STATUS_ERROR; 46 } 47 48 *ret_size = FCS_RANDOM_BYTE_SIZE; 49 50 for (i = 0U; i < FCS_RANDOM_WORD_SIZE; i++) { 51 mmio_write_32(addr, random_data[i]); 52 addr += MBOX_WORD_BYTE; 53 } 54 55 flush_dcache_range(addr - *ret_size, *ret_size); 56 57 return INTEL_SIP_SMC_STATUS_OK; 58 } 59 60 uint32_t intel_fcs_send_cert(uint64_t addr, uint64_t size, 61 uint32_t *send_id) 62 { 63 int status; 64 65 if (!is_address_in_ddr_range(addr, size)) { 66 return INTEL_SIP_SMC_STATUS_REJECTED; 67 } 68 69 if (!is_size_4_bytes_aligned(size)) { 70 return INTEL_SIP_SMC_STATUS_REJECTED; 71 } 72 73 status = mailbox_send_cmd_async(send_id, MBOX_CMD_VAB_SRC_CERT, 74 (uint32_t *)addr, size / MBOX_WORD_BYTE, 75 CMD_DIRECT); 76 77 if (status < 0) { 78 return INTEL_SIP_SMC_STATUS_ERROR; 79 } 80 81 return INTEL_SIP_SMC_STATUS_OK; 82 } 83 84 uint32_t intel_fcs_get_provision_data(uint32_t *send_id) 85 { 86 int status; 87 88 status = mailbox_send_cmd_async(send_id, MBOX_FCS_GET_PROVISION, 89 NULL, 0U, CMD_DIRECT); 90 91 if (status < 0) { 92 return INTEL_SIP_SMC_STATUS_ERROR; 93 } 94 95 return INTEL_SIP_SMC_STATUS_OK; 96 } 97 98 uint32_t intel_fcs_cryption(uint32_t mode, uint32_t src_addr, 99 uint32_t src_size, uint32_t dst_addr, 100 uint32_t dst_size, uint32_t *send_id) 101 { 102 int status; 103 uint32_t cmd; 104 105 fcs_crypt_payload payload = { 106 FCS_CRYPTION_DATA_0, 107 src_addr, 108 src_size, 109 dst_addr, 110 dst_size }; 111 112 if (!is_address_in_ddr_range(src_addr, src_size) || 113 !is_address_in_ddr_range(dst_addr, dst_size)) { 114 return INTEL_SIP_SMC_STATUS_REJECTED; 115 } 116 117 if (!is_size_4_bytes_aligned(sizeof(fcs_crypt_payload))) { 118 return INTEL_SIP_SMC_STATUS_REJECTED; 119 } 120 121 if (mode != 0U) { 122 cmd = MBOX_FCS_ENCRYPT_REQ; 123 } else { 124 cmd = MBOX_FCS_DECRYPT_REQ; 125 } 126 127 status = mailbox_send_cmd_async(send_id, cmd, (uint32_t *) &payload, 128 sizeof(fcs_crypt_payload) / MBOX_WORD_BYTE, 129 CMD_INDIRECT); 130 inv_dcache_range(dst_addr, dst_size); 131 132 if (status < 0) { 133 return INTEL_SIP_SMC_STATUS_REJECTED; 134 } 135 136 return INTEL_SIP_SMC_STATUS_OK; 137 } 138 139 uint32_t intel_fcs_get_rom_patch_sha384(uint64_t addr, uint64_t *ret_size, 140 uint32_t *mbox_error) 141 { 142 int status; 143 unsigned int resp_len = FCS_SHA384_WORD_SIZE; 144 145 if (!is_address_in_ddr_range(addr, FCS_SHA384_BYTE_SIZE)) { 146 return INTEL_SIP_SMC_STATUS_REJECTED; 147 } 148 149 status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_GET_ROM_PATCH_SHA384, NULL, 0U, 150 CMD_CASUAL, (uint32_t *) addr, &resp_len); 151 152 if (status < 0) { 153 *mbox_error = -status; 154 return INTEL_SIP_SMC_STATUS_ERROR; 155 } 156 157 if (resp_len != FCS_SHA384_WORD_SIZE) { 158 *mbox_error = GENERIC_RESPONSE_ERROR; 159 return INTEL_SIP_SMC_STATUS_ERROR; 160 } 161 162 *ret_size = FCS_SHA384_BYTE_SIZE; 163 164 flush_dcache_range(addr, *ret_size); 165 166 return INTEL_SIP_SMC_STATUS_OK; 167 } 168