1 /* 2 * Copyright (c) 2019-2022, Intel Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SOCFPGA_SIP_SVC_H 8 #define SOCFPGA_SIP_SVC_H 9 10 11 /* SiP status response */ 12 #define INTEL_SIP_SMC_STATUS_OK 0 13 #define INTEL_SIP_SMC_STATUS_BUSY 0x1 14 #define INTEL_SIP_SMC_STATUS_REJECTED 0x2 15 #define INTEL_SIP_SMC_STATUS_ERROR 0x4 16 #define INTEL_SIP_SMC_RSU_ERROR 0x7 17 18 /* SiP mailbox error code */ 19 #define GENERIC_RESPONSE_ERROR 0x3FF 20 21 /* SMC SiP service function identifier */ 22 23 /* FPGA Reconfig */ 24 #define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001 25 #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002 26 #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003 27 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004 28 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005 29 30 /* Secure Register Access */ 31 #define INTEL_SIP_SMC_REG_READ 0xC2000007 32 #define INTEL_SIP_SMC_REG_WRITE 0xC2000008 33 #define INTEL_SIP_SMC_REG_UPDATE 0xC2000009 34 35 /* Remote System Update */ 36 #define INTEL_SIP_SMC_RSU_STATUS 0xC200000B 37 #define INTEL_SIP_SMC_RSU_UPDATE 0xC200000C 38 #define INTEL_SIP_SMC_RSU_NOTIFY 0xC200000E 39 #define INTEL_SIP_SMC_RSU_RETRY_COUNTER 0xC200000F 40 #define INTEL_SIP_SMC_RSU_DCMF_VERSION 0xC2000010 41 #define INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION 0xC2000011 42 #define INTEL_SIP_SMC_RSU_MAX_RETRY 0xC2000012 43 #define INTEL_SIP_SMC_RSU_COPY_MAX_RETRY 0xC2000013 44 45 46 /* ECC */ 47 #define INTEL_SIP_SMC_ECC_DBE 0xC200000D 48 49 /* Generic Command */ 50 #define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384 0xC2000040 51 52 /* Send Mailbox Command */ 53 #define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200001E 54 #define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032 55 56 57 /* SiP Definitions */ 58 59 /* ECC DBE */ 60 #define WARM_RESET_WFI_FLAG BIT(31) 61 #define SYSMGR_ECC_DBE_COLD_RST_MASK (SYSMGR_ECC_OCRAM_MASK |\ 62 SYSMGR_ECC_DDR0_MASK |\ 63 SYSMGR_ECC_DDR1_MASK) 64 65 /* Non-mailbox SMC Call */ 66 #define INTEL_SIP_SMC_SVC_VERSION 0xC2000200 67 68 /* SMC function IDs for SiP Service queries */ 69 #define SIP_SVC_CALL_COUNT 0x8200ff00 70 #define SIP_SVC_UID 0x8200ff01 71 #define SIP_SVC_VERSION 0x8200ff03 72 73 /* SiP Service Calls version numbers */ 74 #define SIP_SVC_VERSION_MAJOR 1 75 #define SIP_SVC_VERSION_MINOR 0 76 77 78 /* Structure Definitions */ 79 struct fpga_config_info { 80 uint32_t addr; 81 int size; 82 int size_written; 83 uint32_t write_requested; 84 int subblocks_sent; 85 int block_number; 86 }; 87 88 typedef enum { 89 FULL_CONFIG = 0, 90 PARTIAL_CONFIG, 91 } config_type; 92 93 /* Function Definitions */ 94 95 bool is_address_in_ddr_range(uint64_t addr, uint64_t size); 96 97 /* ECC DBE */ 98 bool cold_reset_for_ecc_dbe(void); 99 uint32_t intel_ecc_dbe_notification(uint64_t dbe_value); 100 101 #endif /* SOCFPGA_SIP_SVC_H */ 102