xref: /rk3399_ARM-atf/plat/intel/soc/common/include/socfpga_sip_svc.h (revision 10ecd58093a34e95e2dfad65b1180610f29397cc)
1 /*
2  * Copyright (c) 2019-2023, Intel Corporation. All rights reserved.
3  * Copyright (c) 2024-2025, Altera Corporation. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef SOCFPGA_SIP_SVC_H
9 #define SOCFPGA_SIP_SVC_H
10 
11 
12 /* SiP status response */
13 #define INTEL_SIP_SMC_STATUS_OK						0
14 #define INTEL_SIP_SMC_STATUS_BUSY					0x1
15 #define INTEL_SIP_SMC_STATUS_REJECTED					0x2
16 #define INTEL_SIP_SMC_STATUS_NO_RESPONSE				0x3
17 #define INTEL_SIP_SMC_STATUS_ERROR					0x4
18 #define INTEL_SIP_SMC_RSU_ERROR						0x7
19 #define INTEL_SIP_SMC_SEU_ERR_READ_ERROR				0x8
20 
21 /* SiP mailbox error code */
22 #define GENERIC_RESPONSE_ERROR						0x3FF
23 
24 /* SiP V2 command code range */
25 #define INTEL_SIP_SMC_CMD_MASK						0xFFFF
26 #define INTEL_SIP_SMC_CMD_V2_RANGE_BEGIN				0x400
27 #define INTEL_SIP_SMC_CMD_V2_RANGE_END					0x4FF
28 
29 /* SiP V3 command code range */
30 #define INTEL_SIP_SMC_CMD_V3_RANGE_BEGIN				0x00C8
31 #define INTEL_SIP_SMC_CMD_V3_RANGE_END					0x01F4
32 
33 /* SiP V2 protocol header */
34 #define INTEL_SIP_SMC_HEADER_JOB_ID_MASK				0xF
35 #define INTEL_SIP_SMC_HEADER_JOB_ID_OFFSET				0U
36 #define INTEL_SIP_SMC_HEADER_CID_MASK					0xF
37 #define INTEL_SIP_SMC_HEADER_CID_OFFSET					4U
38 #define INTEL_SIP_SMC_HEADER_VERSION_MASK				0xF
39 #define INTEL_SIP_SMC_HEADER_VERSION_OFFSET				60U
40 
41 /* SMC SiP service function identifier for version 1 */
42 
43 /* FPGA Reconfig */
44 #define INTEL_SIP_SMC_FPGA_CONFIG_START					0xC2000001
45 #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE					0x42000002
46 #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE			0xC2000003
47 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE				0xC2000004
48 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM				0xC2000005
49 
50 /* FPGA Bitstream Flag */
51 #define FLAG_PARTIAL_CONFIG						BIT(0)
52 #define FLAG_AUTHENTICATION						BIT(1)
53 #define CONFIG_TEST_FLAG(_flag, _type)					(((flag) & FLAG_##_type) \
54 									== FLAG_##_type)
55 
56 /* Secure Register Access */
57 #define INTEL_SIP_SMC_REG_READ						0xC2000007
58 #define INTEL_SIP_SMC_REG_WRITE						0xC2000008
59 #define INTEL_SIP_SMC_REG_UPDATE					0xC2000009
60 
61 /* Remote System Update */
62 #define INTEL_SIP_SMC_RSU_STATUS					0xC200000B
63 #define INTEL_SIP_SMC_RSU_UPDATE					0xC200000C
64 #define INTEL_SIP_SMC_RSU_NOTIFY					0xC200000E
65 #define INTEL_SIP_SMC_RSU_RETRY_COUNTER					0xC200000F
66 #define INTEL_SIP_SMC_RSU_DCMF_VERSION					0xC2000010
67 #define INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION				0xC2000011
68 #define INTEL_SIP_SMC_RSU_MAX_RETRY					0xC2000012
69 #define INTEL_SIP_SMC_RSU_COPY_MAX_RETRY				0xC2000013
70 #define INTEL_SIP_SMC_RSU_DCMF_STATUS					0xC2000014
71 #define INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS				0xC2000015
72 #define INTEL_SIP_SMC_RSU_GET_DEVICE_INFO				0xC2000016
73 
74 /* Hardware monitor */
75 #define INTEL_SIP_SMC_HWMON_READTEMP					0xC2000020
76 #define INTEL_SIP_SMC_HWMON_READVOLT					0xC2000021
77 #define TEMP_CHANNEL_MAX						(1 << 15)
78 #define VOLT_CHANNEL_MAX						(1 << 15)
79 
80 /* ECC */
81 #define INTEL_SIP_SMC_ECC_DBE						0xC200000D
82 
83 /* Generic Command */
84 #define INTEL_SIP_SMC_SERVICE_COMPLETED					0xC200001E
85 #define INTEL_SIP_SMC_FIRMWARE_VERSION					0xC200001F
86 #define INTEL_SIP_SMC_HPS_SET_BRIDGES					0xC2000032
87 #define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384				0xC2000040
88 
89 #define SERVICE_COMPLETED_MODE_ASYNC					0x00004F4E
90 
91 /* Mailbox Command */
92 #define INTEL_SIP_SMC_MBOX_SEND_CMD					0xC200003C
93 #define INTEL_SIP_SMC_GET_USERCODE					0xC200003D
94 
95 /* FPGA Crypto Services */
96 #define INTEL_SIP_SMC_FCS_RANDOM_NUMBER					0xC200005A
97 #define INTEL_SIP_SMC_FCS_RANDOM_NUMBER_EXT				0x4200008F
98 #define INTEL_SIP_SMC_FCS_CRYPTION					0x4200005B
99 #define INTEL_SIP_SMC_FCS_CRYPTION_EXT					0xC2000090
100 #define INTEL_SIP_SMC_FCS_SERVICE_REQUEST				0x4200005C
101 #define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE				0x4200005D
102 #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA				0x4200005E
103 #define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH				0xC200005F
104 #define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN				0xC2000064
105 #define INTEL_SIP_SMC_FCS_CHIP_ID					0xC2000065
106 #define INTEL_SIP_SMC_FCS_ATTESTATION_SUBKEY				0xC2000066
107 #define INTEL_SIP_SMC_FCS_ATTESTATION_MEASUREMENTS			0xC2000067
108 #define INTEL_SIP_SMC_FCS_GET_ATTESTATION_CERT				0xC2000068
109 #define INTEL_SIP_SMC_FCS_CREATE_CERT_ON_RELOAD				0xC2000069
110 #define INTEL_SIP_SMC_FCS_OPEN_CS_SESSION				0xC200006E
111 #define INTEL_SIP_SMC_FCS_CLOSE_CS_SESSION				0xC200006F
112 #define INTEL_SIP_SMC_FCS_IMPORT_CS_KEY					0x42000070
113 #define INTEL_SIP_SMC_FCS_EXPORT_CS_KEY					0xC2000071
114 #define INTEL_SIP_SMC_FCS_REMOVE_CS_KEY					0xC2000072
115 #define INTEL_SIP_SMC_FCS_GET_CS_KEY_INFO				0xC2000073
116 #define INTEL_SIP_SMC_FCS_AES_CRYPT_INIT				0xC2000074
117 #define INTEL_SIP_SMC_FCS_AES_CRYPT_UPDATE				0x42000075
118 #define INTEL_SIP_SMC_FCS_AES_CRYPT_FINALIZE				0x42000076
119 #define INTEL_SIP_SMC_FCS_GET_DIGEST_INIT				0xC2000077
120 #define INTEL_SIP_SMC_FCS_GET_DIGEST_UPDATE				0xC2000078
121 #define INTEL_SIP_SMC_FCS_GET_DIGEST_FINALIZE				0xC2000079
122 #define INTEL_SIP_SMC_FCS_GET_DIGEST_SMMU_UPDATE			0x42000091
123 #define INTEL_SIP_SMC_FCS_GET_DIGEST_SMMU_FINALIZE			0x42000092
124 #define INTEL_SIP_SMC_FCS_MAC_VERIFY_INIT				0xC200007A
125 #define INTEL_SIP_SMC_FCS_MAC_VERIFY_UPDATE				0xC200007B
126 #define INTEL_SIP_SMC_FCS_MAC_VERIFY_FINALIZE				0xC200007C
127 #define INTEL_SIP_SMC_FCS_MAC_VERIFY_SMMU_UPDATE			0x42000093
128 #define INTEL_SIP_SMC_FCS_MAC_VERIFY_SMMU_FINALIZE			0x42000094
129 #define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIGN_INIT				0xC200007D
130 #define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIGN_FINALIZE			0xC200007F
131 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_INIT			0xC2000080
132 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_UPDATE			0xC2000081
133 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE			0xC2000082
134 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_SMMU_UPDATE		0x42000095
135 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_SMMU_FINALIZE		0x42000096
136 #define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_INIT			0xC2000083
137 #define INTEL_SIP_SMC_FCS_ECDSA_HASH_SIG_VERIFY_FINALIZE		0xC2000085
138 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT		0xC2000086
139 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_UPDATE		0xC2000087
140 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_FINALIZE		0xC2000088
141 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_SMMU_UPDATE	0x42000097
142 #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_SMMU_FINALIZE	0x42000098
143 #define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT				0xC2000089
144 #define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_FINALIZE			0xC200008B
145 #define INTEL_SIP_SMC_FCS_ECDH_REQUEST_INIT				0xC200008C
146 #define INTEL_SIP_SMC_FCS_ECDH_REQUEST_FINALIZE				0xC200008E
147 #define INTEL_SIP_SMC_FCS_SDM_REMAPPER_CONFIG				0xC2000201
148 
149 /* SEU ERR */
150 #define INTEL_SIP_SMC_SEU_ERR_STATUS					0xC2000099
151 #define INTEL_SIP_SMC_SAFE_INJECT_SEU_ERR				0xC200009A
152 
153 /* ATF build version */
154 #define INTEL_SIP_SMC_ATF_BUILD_VER					0xC200009B
155 
156 #define INTEL_SIP_SMC_FCS_SHA_MODE_MASK					0xF
157 #define INTEL_SIP_SMC_FCS_DIGEST_SIZE_MASK				0xF
158 #define INTEL_SIP_SMC_FCS_DIGEST_SIZE_OFFSET				4U
159 #define INTEL_SIP_SMC_FCS_ECC_ALGO_MASK					0xF
160 
161 /* ECC DBE */
162 #define WARM_RESET_WFI_FLAG						BIT(31)
163 #define SYSMGR_ECC_DBE_COLD_RST_MASK					(SYSMGR_ECC_OCRAM_MASK |\
164 									SYSMGR_ECC_DDR0_MASK |\
165 									SYSMGR_ECC_DDR1_MASK)
166 
167 /* Non-mailbox SMC Call */
168 #define INTEL_SIP_SMC_SVC_VERSION					0xC2000200
169 
170 /**
171  * SMC SiP service function identifier for version 2
172  * Command code from 0x400 ~ 0x4FF
173  */
174 
175 /* V2: Non-mailbox function identifier */
176 #define INTEL_SIP_SMC_V2_GET_SVC_VERSION				0xC2000400
177 #define INTEL_SIP_SMC_V2_REG_READ					0xC2000401
178 #define INTEL_SIP_SMC_V2_REG_WRITE					0xC2000402
179 #define INTEL_SIP_SMC_V2_REG_UPDATE					0xC2000403
180 #define INTEL_SIP_SMC_V2_HPS_SET_BRIDGES				0xC2000404
181 #define INTEL_SIP_SMC_V2_RSU_UPDATE_ADDR				0xC2000405
182 
183 /* V2: Mailbox function identifier */
184 #define INTEL_SIP_SMC_V2_MAILBOX_SEND_COMMAND				0xC2000420
185 #define INTEL_SIP_SMC_V2_MAILBOX_POLL_RESPONSE				0xC2000421
186 
187 /* SMC function IDs for SiP Service queries */
188 #define SIP_SVC_CALL_COUNT						0x8200ff00
189 #define SIP_SVC_UID							0x8200ff01
190 #define SIP_SVC_VERSION							0x8200ff03
191 
192 /* SiP Service Calls version numbers */
193 /*
194  * Increase if there is any backward compatibility impact
195  */
196 #define SIP_SVC_VERSION_MAJOR						3
197 /*
198  * Increase if there is new SMC function ID being added
199  */
200 #define SIP_SVC_VERSION_MINOR						1
201 
202 
203 /* Structure Definitions */
204 struct fpga_config_info {
205 	uint32_t addr;
206 	int size;
207 	int size_written;
208 	uint32_t write_requested;
209 	int subblocks_sent;
210 	int block_number;
211 };
212 
213 typedef enum {
214 	NO_REQUEST = 0,
215 	RECONFIGURATION,
216 	BITSTREAM_AUTH
217 } config_type;
218 
219 /* Function Definitions */
220 bool is_size_4_bytes_aligned(uint32_t size);
221 bool is_address_in_ddr_range(uint64_t addr, uint64_t size);
222 
223 /* ECC DBE */
224 bool cold_reset_for_ecc_dbe(void);
225 uint32_t intel_ecc_dbe_notification(uint64_t dbe_value);
226 
227 /* Secure register access */
228 uint32_t intel_secure_reg_read(uint64_t reg_addr, uint32_t *retval);
229 uint32_t intel_secure_reg_write(uint64_t reg_addr, uint32_t val,
230 				uint32_t *retval);
231 uint32_t intel_secure_reg_update(uint64_t reg_addr, uint32_t mask,
232 				 uint32_t val, uint32_t *retval);
233 
234 /* Set RSU update address*/
235 uint32_t intel_rsu_update(uint64_t update_address);
236 
237 /* Miscellaneous HPS services */
238 uint32_t intel_hps_set_bridges(uint64_t enable, uint64_t mask);
239 
240 /* SiP Service handler for version 2 */
241 uintptr_t sip_smc_handler_v2(uint32_t smc_fid,
242 			 u_register_t x1,
243 			 u_register_t x2,
244 			 u_register_t x3,
245 			 u_register_t x4,
246 			 void *cookie,
247 			 void *handle,
248 			 u_register_t flags);
249 
250 
251 #if SIP_SVC_V3
252 #define SMC_RET_ARGS_ONE							(1)
253 #define SMC_RET_ARGS_TWO							(2)
254 #define SMC_RET_ARGS_THREE							(3)
255 #define SMC_RET_ARGS_FOUR							(4)
256 #define SMC_RET_ARGS_FIVE							(5)
257 #define SMC_RET_ARGS_SIX							(6)
258 
259 /*
260  * SiP SVC Version3 SMC Functions IDs
261  */
262 
263 /* Generic response POLL commands */
264 #define ALTERA_SIP_SMC_ASYNC_RESP_POLL						(0x420000C8)
265 #define ALTERA_SIP_SMC_ASYNC_RESP_POLL_ON_INTR					(0x420000C9)
266 
267 /* QSPI related commands */
268 #define ALTERA_SIP_SMC_ASYNC_QSPI_OPEN						(0x420000CC)
269 #define ALTERA_SIP_SMC_ASYNC_QSPI_CLOSE						(0x420000CD)
270 #define ALTERA_SIP_SMC_ASYNC_QSPI_SET_CS					(0x420000CE)
271 #define ALTERA_SIP_SMC_ASYNC_QSPI_ERASE						(0x420000CF)
272 #define ALTERA_SIP_SMC_ASYNC_QSPI_WRITE						(0x420000D0)
273 #define ALTERA_SIP_SMC_ASYNC_QSPI_READ						(0x420000D1)
274 #define ALTERA_SIP_SMC_ASYNC_GET_DEVICE_IDENTITY				(0x420000D2)
275 #define ALTERA_SIP_SMC_ASYNC_GET_IDCODE						(0x420000D3)
276 #define ALTERA_SIP_SMC_ASYNC_QSPI_GET_DEV_INFO					(0x420000D4)
277 
278 #define ALTERA_SIP_SMC_ASYNC_HWMON_READTEMP					(0x420000E8)
279 #define ALTERA_SIP_SMC_ASYNC_HWMON_READVOLT					(0x420000E9)
280 
281 /* FCS crypto service VAB/SDOS commands */
282 #define ALTERA_SIP_SMC_ASYNC_FCS_RANDOM_NUMBER					(0x4200012C)
283 #define ALTERA_SIP_SMC_ASYNC_FCS_RANDOM_NUMBER_EXT				(0x4200012D)
284 #define ALTERA_SIP_SMC_ASYNC_FCS_CRYPTION					(0x4200012E)
285 #define ALTERA_SIP_SMC_ASYNC_FCS_CRYPTION_EXT					(0x4200012F)
286 #define ALTERA_SIP_SMC_ASYNC_FCS_SERVICE_REQUEST				(0x42000130)
287 #define ALTERA_SIP_SMC_ASYNC_FCS_SEND_CERTIFICATE				(0x42000131)
288 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_PROVISION_DATA				(0x42000132)
289 #define ALTERA_SIP_SMC_ASYNC_FCS_CNTR_SET_PREAUTH				(0x42000133)
290 #define ALTERA_SIP_SMC_ASYNC_FCS_PSGSIGMA_TEARDOWN				(0x42000134)
291 #define ALTERA_SIP_SMC_ASYNC_FCS_CHIP_ID					(0x42000135)
292 #define ALTERA_SIP_SMC_ASYNC_FCS_ATTESTATION_SUBKEY				(0x42000136)
293 #define ALTERA_SIP_SMC_ASYNC_FCS_ATTESTATION_MEASUREMENTS			(0x42000137)
294 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_ATTESTATION_CERT				(0x42000138)
295 #define ALTERA_SIP_SMC_ASYNC_FCS_CREATE_CERT_ON_RELOAD				(0x42000139)
296 
297 /* FCS crypto service session management commands */
298 #define ALTERA_SIP_SMC_ASYNC_FCS_OPEN_CS_SESSION				(0x4200013A)
299 #define ALTERA_SIP_SMC_ASYNC_FCS_CLOSE_CS_SESSION				(0x4200013B)
300 
301 /* FCS crypto service key management commands */
302 #define ALTERA_SIP_SMC_ASYNC_FCS_IMPORT_CS_KEY					(0x4200013C)
303 #define ALTERA_SIP_SMC_ASYNC_FCS_EXPORT_CS_KEY					(0x4200013D)
304 #define ALTERA_SIP_SMC_ASYNC_FCS_REMOVE_CS_KEY					(0x4200013E)
305 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_CS_KEY_INFO				(0x4200013F)
306 #define ALTERA_SIP_SMC_ASYNC_FCS_CREATE_CS_KEY					(0x42000167)
307 
308 /* FCS crypto service primitive commands */
309 #define ALTERA_SIP_SMC_ASYNC_FCS_AES_CRYPT_INIT					(0x42000140)
310 #define ALTERA_SIP_SMC_ASYNC_FCS_AES_CRYPT_UPDATE				(0x42000141)
311 #define ALTERA_SIP_SMC_ASYNC_FCS_AES_CRYPT_FINALIZE				(0x42000142)
312 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_DIGEST_INIT				(0x42000143)
313 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_DIGEST_UPDATE				(0x42000144)
314 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_DIGEST_FINALIZE				(0x42000145)
315 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_DIGEST_SMMU_UPDATE				(0x42000146)
316 #define ALTERA_SIP_SMC_ASYNC_FCS_GET_DIGEST_SMMU_FINALIZE			(0x42000147)
317 #define ALTERA_SIP_SMC_ASYNC_FCS_MAC_VERIFY_INIT				(0x42000148)
318 #define ALTERA_SIP_SMC_ASYNC_FCS_MAC_VERIFY_UPDATE				(0x42000149)
319 #define ALTERA_SIP_SMC_ASYNC_FCS_MAC_VERIFY_FINALIZE				(0x4200014A)
320 #define ALTERA_SIP_SMC_ASYNC_FCS_MAC_VERIFY_SMMU_UPDATE				(0x4200014B)
321 #define ALTERA_SIP_SMC_ASYNC_FCS_MAC_VERIFY_SMMU_FINALIZE			(0x4200014C)
322 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_HASH_SIGN_INIT				(0x4200014D)
323 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_HASH_SIGN_FINALIZE			(0x4200014E)
324 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIGN_INIT			(0x4200014F)
325 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIGN_UPDATE			(0x42000150)
326 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE			(0x42000151)
327 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIGN_SMMU_UPDATE		(0x42000152)
328 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIGN_SMMU_FINALIZE		(0x42000153)
329 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_HASH_SIG_VERIFY_INIT			(0x42000154)
330 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_HASH_SIG_VERIFY_FINALIZE			(0x42000155)
331 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT		(0x42000156)
332 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_UPDATE		(0x42000157)
333 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_FINALIZE		(0x42000158)
334 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_SMMU_UPDATE		(0x42000159)
335 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_SMMU_FINALIZE	(0x4200015A)
336 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_GET_PUBKEY_INIT				(0x42000160)
337 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDSA_GET_PUBKEY_FINALIZE			(0x42000161)
338 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDH_REQUEST_INIT				(0x42000162)
339 #define ALTERA_SIP_SMC_ASYNC_FCS_ECDH_REQUEST_FINALIZE				(0x42000163)
340 #define ALTERA_SIP_SMC_ASYNC_FCS_SDM_REMAPPER_CONFIG				(0x42000164)
341 #define ALTERA_SIP_SMC_ASYNC_MCTP_MSG						(0x42000165)
342 #define ALTERA_SIP_SMC_ASYNC_FCS_HKDF_REQUEST					(0x42000166)
343 #define ALTERA_SIP_SMC_ASYNC_FCS_CREATE_CS_KEY					(0x42000167)
344 
345 #define GET_CLIENT_ID(x)							(((x) & 0xF0) >> 4)
346 #define GET_JOB_ID(x)								((x) & 0x0F)
347 #endif	/* SIP_SVC_V3 */
348 
349 #endif /* SOCFPGA_SIP_SVC_H */
350