1 /* 2 * Copyright (c) 2019, Intel Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SOCFPGA_MBOX_H 8 #define SOCFPGA_MBOX_H 9 10 #include <lib/utils_def.h> 11 12 #define MBOX_OFFSET 0xffa30000 13 14 #define MBOX_ATF_CLIENT_ID 0x1 15 #define MBOX_JOB_ID 0x1 16 17 /* Mailbox interrupt flags and masks */ 18 #define MBOX_INT_FLAG_COE 0x1 19 #define MBOX_INT_FLAG_RIE 0x2 20 #define MBOX_INT_FLAG_UAE 0x100 21 #define MBOX_COE_BIT(INTERRUPT) ((INTERRUPT) & 0x3) 22 #define MBOX_UAE_BIT(INTERRUPT) (((INTERRUPT) & (1<<8))) 23 24 /* Mailbox response and status */ 25 #define MBOX_RESP_BUFFER_SIZE 16 26 #define MBOX_RESP_ERR(BUFFER) ((BUFFER) & 0x00000fff) 27 #define MBOX_RESP_LEN(BUFFER) (((BUFFER) & 0x007ff000) >> 12) 28 #define MBOX_RESP_CLIENT_ID(BUFFER) (((BUFFER) & 0xf0000000) >> 28) 29 #define MBOX_RESP_JOB_ID(BUFFER) (((BUFFER) & 0x0f000000) >> 24) 30 #define MBOX_STATUS_UA_MASK (1<<8) 31 32 /* Mailbox command and response */ 33 #define MBOX_CMD_FREE_OFFSET 0x14 34 #define MBOX_CMD_BUFFER_SIZE 32 35 #define MBOX_CLIENT_ID_CMD(CLIENT_ID) ((CLIENT_ID) << 28) 36 #define MBOX_JOB_ID_CMD(JOB_ID) (JOB_ID<<24) 37 #define MBOX_CMD_LEN_CMD(CMD_LEN) ((CMD_LEN) << 12) 38 #define MBOX_INDIRECT (1 << 11) 39 #define MBOX_INSUFFICIENT_BUFFER -2 40 #define MBOX_CIN 0x00 41 #define MBOX_ROUT 0x04 42 #define MBOX_URG 0x08 43 #define MBOX_INT 0x0C 44 #define MBOX_COUT 0x20 45 #define MBOX_RIN 0x24 46 #define MBOX_STATUS 0x2C 47 #define MBOX_CMD_BUFFER 0x40 48 #define MBOX_RESP_BUFFER 0xC0 49 50 #define MBOX_RESP_BUFFER_SIZE 16 51 #define MBOX_RESP_OK 0 52 #define MBOX_RESP_INVALID_CMD 1 53 #define MBOX_RESP_UNKNOWN_BR 2 54 #define MBOX_RESP_UNKNOWN 3 55 #define MBOX_RESP_NOT_CONFIGURED 256 56 57 /* Mailbox SDM doorbell */ 58 #define MBOX_DOORBELL_TO_SDM 0x400 59 #define MBOX_DOORBELL_FROM_SDM 0x480 60 61 /* Mailbox QSPI commands */ 62 #define MBOX_CMD_RESTART 2 63 #define MBOX_CMD_QSPI_OPEN 50 64 #define MBOX_CMD_QSPI_CLOSE 51 65 #define MBOX_CMD_QSPI_DIRECT 59 66 #define MBOX_CMD_GET_IDCODE 16 67 #define MBOX_CMD_QSPI_SET_CS 52 68 69 /* Mailbox REBOOT commands */ 70 #define MBOX_CMD_REBOOT_HPS 71 71 72 /* Generic error handling */ 73 #define MBOX_TIMEOUT -2047 74 #define MBOX_NO_RESPONSE -2 75 #define MBOX_WRONG_ID -3 76 77 /* Mailbox status */ 78 #define RECONFIG_STATUS_STATE 0 79 #define RECONFIG_STATUS_PIN_STATUS 2 80 #define RECONFIG_STATUS_SOFTFUNC_STATUS 3 81 #define PIN_STATUS_NSTATUS (U(1) << 31) 82 #define SOFTFUNC_STATUS_SEU_ERROR (1 << 3) 83 #define SOFTFUNC_STATUS_INIT_DONE (1 << 1) 84 #define SOFTFUNC_STATUS_CONF_DONE (1 << 0) 85 #define MBOX_CFGSTAT_STATE_CONFIG 0x10000000 86 87 /* SMC function IDs for SiP Service queries */ 88 #define SIP_SVC_CALL_COUNT 0x8200ff00 89 #define SIP_SVC_UID 0x8200ff01 90 #define SIP_SVC_VERSION 0x8200ff03 91 92 /* SiP Service Calls version numbers */ 93 #define SIP_SVC_VERSION_MAJOR 0 94 #define SIP_SVC_VERSION_MINOR 1 95 96 /* Mailbox reconfiguration commands */ 97 #define MBOX_RECONFIG 6 98 #define MBOX_RECONFIG_DATA 8 99 #define MBOX_RECONFIG_STATUS 9 100 101 /* Sip get memory */ 102 #define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001 103 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005 104 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004 105 #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002 106 #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003 107 #define INTEL_SIP_SMC_STATUS_OK 0 108 #define INTEL_SIP_SMC_STATUS_ERROR 0x4 109 #define INTEL_SIP_SMC_STATUS_BUSY 0x1 110 #define INTEL_SIP_SMC_STATUS_REJECTED 0x2 111 #define INTEL_SIP_SMC_FPGA_CONFIG_ADDR 0x1000 112 #define INTEL_SIP_SMC_FPGA_CONFIG_SIZE 16777216 113 114 void mailbox_set_int(int interrupt_input); 115 int mailbox_init(void); 116 void mailbox_set_qspi_close(void); 117 void mailbox_set_qspi_open(void); 118 void mailbox_set_qspi_direct(void); 119 int mailbox_send_cmd(int job_id, unsigned int cmd, uint32_t *args, 120 int len, int urgent, uint32_t *response); 121 void mailbox_send_cmd_async(int job_id, unsigned int cmd, uint32_t *args, 122 int len, int urgent); 123 int mailbox_read_response(int job_id, uint32_t *response); 124 int mailbox_get_qspi_clock(void); 125 void mailbox_reset_cold(void); 126 127 #endif /* SOCFPGA_MBOX_H */ 128