1 /* 2 * Copyright (c) 2020-2022, Intel Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SOCFPGA_FCS_H 8 #define SOCFPGA_FCS_H 9 10 /* FCS Definitions */ 11 12 #define FCS_RANDOM_WORD_SIZE 8U 13 #define FCS_PROV_DATA_WORD_SIZE 44U 14 #define FCS_SHA384_WORD_SIZE 12U 15 16 #define FCS_RANDOM_BYTE_SIZE (FCS_RANDOM_WORD_SIZE * 4U) 17 #define FCS_RANDOM_EXT_MAX_WORD_SIZE 1020U 18 #define FCS_PROV_DATA_BYTE_SIZE (FCS_PROV_DATA_WORD_SIZE * 4U) 19 #define FCS_SHA384_BYTE_SIZE (FCS_SHA384_WORD_SIZE * 4U) 20 21 #define FCS_RANDOM_EXT_OFFSET 3 22 23 #define FCS_MODE_DECRYPT 0x0 24 #define FCS_MODE_ENCRYPT 0x1 25 #define FCS_ENCRYPTION_DATA_0 0x10100 26 #define FCS_DECRYPTION_DATA_0 0x10102 27 #define FCS_OWNER_ID_OFFSET 0xC 28 29 #define PSGSIGMA_TEARDOWN_MAGIC 0xB852E2A4 30 #define PSGSIGMA_SESSION_ID_ONE 0x1 31 #define PSGSIGMA_UNKNOWN_SESSION 0xFFFFFFFF 32 33 #define RESERVED_AS_ZERO 0x0 34 /* FCS Single cert */ 35 36 #define FCS_BIG_CNTR_SEL 0x1 37 38 #define FCS_SVN_CNTR_0_SEL 0x2 39 #define FCS_SVN_CNTR_1_SEL 0x3 40 #define FCS_SVN_CNTR_2_SEL 0x4 41 #define FCS_SVN_CNTR_3_SEL 0x5 42 43 #define FCS_BIG_CNTR_VAL_MAX 495U 44 #define FCS_SVN_CNTR_VAL_MAX 64U 45 46 /* FCS Attestation Cert Request Parameter */ 47 48 #define FCS_ALIAS_CERT 0x01 49 #define FCS_DEV_ID_SELF_SIGN_CERT 0x02 50 #define FCS_DEV_ID_ENROLL_CERT 0x04 51 #define FCS_ENROLL_SELF_SIGN_CERT 0x08 52 #define FCS_PLAT_KEY_CERT 0x10 53 54 /* FCS Crypto Service */ 55 56 #define FCS_CS_KEY_OBJ_MAX_WORD_SIZE 88U 57 #define FCS_CS_KEY_INFO_MAX_WORD_SIZE 36U 58 #define FCS_CS_KEY_RESP_STATUS_MASK 0xFF 59 #define FCS_CS_KEY_RESP_STATUS_OFFSET 16U 60 61 #define FCS_CS_FIELD_SIZE_MASK 0xFFFF 62 #define FCS_CS_FIELD_FLAG_OFFSET 24 63 #define FCS_CS_FIELD_FLAG_INIT BIT(0) 64 #define FCS_CS_FIELD_FLAG_UPDATE BIT(1) 65 #define FCS_CS_FIELD_FLAG_FINALIZE BIT(2) 66 67 #define FCS_AES_MAX_DATA_SIZE 0x10000000 /* 256 MB */ 68 #define FCS_AES_MIN_DATA_SIZE 0x20 /* 32 Byte */ 69 #define FCS_AES_CMD_MAX_WORD_SIZE 15U 70 71 #define FCS_GET_DIGEST_CMD_MAX_WORD_SIZE 7U 72 #define FCS_GET_DIGEST_RESP_MAX_WORD_SIZE 19U 73 #define FCS_MAC_VERIFY_CMD_MAX_WORD_SIZE 23U 74 #define FCS_MAC_VERIFY_RESP_MAX_WORD_SIZE 4U 75 #define FCS_SHA_HMAC_CRYPTO_PARAM_SIZE_OFFSET 8U 76 /* FCS Payload Structure */ 77 typedef struct fcs_rng_payload_t { 78 uint32_t session_id; 79 uint32_t context_id; 80 uint32_t crypto_header; 81 uint32_t size; 82 } fcs_rng_payload; 83 84 typedef struct fcs_encrypt_payload_t { 85 uint32_t first_word; 86 uint32_t src_addr; 87 uint32_t src_size; 88 uint32_t dst_addr; 89 uint32_t dst_size; 90 } fcs_encrypt_payload; 91 92 typedef struct fcs_decrypt_payload_t { 93 uint32_t first_word; 94 uint32_t owner_id[2]; 95 uint32_t src_addr; 96 uint32_t src_size; 97 uint32_t dst_addr; 98 uint32_t dst_size; 99 } fcs_decrypt_payload; 100 101 typedef struct psgsigma_teardown_msg_t { 102 uint32_t reserved_word; 103 uint32_t magic_word; 104 uint32_t session_id; 105 } psgsigma_teardown_msg; 106 107 typedef struct fcs_cntr_set_preauth_payload_t { 108 uint32_t first_word; 109 uint32_t counter_value; 110 } fcs_cntr_set_preauth_payload; 111 112 typedef struct fcs_cs_key_payload_t { 113 uint32_t session_id; 114 uint32_t reserved0; 115 uint32_t reserved1; 116 uint32_t key_id; 117 } fcs_cs_key_payload; 118 119 typedef struct fcs_crypto_service_data_t { 120 uint32_t session_id; 121 uint32_t context_id; 122 uint32_t key_id; 123 uint32_t crypto_param_size; 124 uint64_t crypto_param; 125 } fcs_crypto_service_data; 126 127 typedef struct fcs_crypto_service_aes_data_t { 128 uint32_t session_id; 129 uint32_t context_id; 130 uint32_t param_size; 131 uint32_t key_id; 132 uint32_t crypto_param[7]; 133 } fcs_crypto_service_aes_data; 134 135 /* Functions Definitions */ 136 137 uint32_t intel_fcs_random_number_gen(uint64_t addr, uint64_t *ret_size, 138 uint32_t *mbox_error); 139 int intel_fcs_random_number_gen_ext(uint32_t session_id, uint32_t context_id, 140 uint32_t size, uint32_t *send_id); 141 uint32_t intel_fcs_send_cert(uint64_t addr, uint64_t size, 142 uint32_t *send_id); 143 uint32_t intel_fcs_get_provision_data(uint32_t *send_id); 144 uint32_t intel_fcs_cntr_set_preauth(uint8_t counter_type, 145 int32_t counter_value, 146 uint32_t test_bit, 147 uint32_t *mbox_error); 148 uint32_t intel_fcs_encryption(uint32_t src_addr, uint32_t src_size, 149 uint32_t dst_addr, uint32_t dst_size, 150 uint32_t *send_id); 151 152 uint32_t intel_fcs_decryption(uint32_t src_addr, uint32_t src_size, 153 uint32_t dst_addr, uint32_t dst_size, 154 uint32_t *send_id); 155 156 int intel_fcs_sigma_teardown(uint32_t session_id, uint32_t *mbox_error); 157 int intel_fcs_chip_id(uint32_t *id_low, uint32_t *id_high, uint32_t *mbox_error); 158 int intel_fcs_attestation_subkey(uint64_t src_addr, uint32_t src_size, 159 uint64_t dst_addr, uint32_t *dst_size, 160 uint32_t *mbox_error); 161 int intel_fcs_get_measurement(uint64_t src_addr, uint32_t src_size, 162 uint64_t dst_addr, uint32_t *dst_size, 163 uint32_t *mbox_error); 164 uint32_t intel_fcs_get_rom_patch_sha384(uint64_t addr, uint64_t *ret_size, 165 uint32_t *mbox_error); 166 167 int intel_fcs_create_cert_on_reload(uint32_t cert_request, 168 uint32_t *mbox_error); 169 int intel_fcs_get_attestation_cert(uint32_t cert_request, uint64_t dst_addr, 170 uint32_t *dst_size, uint32_t *mbox_error); 171 172 int intel_fcs_open_crypto_service_session(uint32_t *session_id, 173 uint32_t *mbox_error); 174 int intel_fcs_close_crypto_service_session(uint32_t session_id, 175 uint32_t *mbox_error); 176 177 int intel_fcs_import_crypto_service_key(uint64_t src_addr, uint32_t src_size, 178 uint32_t *mbox_error); 179 int intel_fcs_export_crypto_service_key(uint32_t session_id, uint32_t key_id, 180 uint64_t dst_addr, uint32_t *dst_size, 181 uint32_t *mbox_error); 182 int intel_fcs_remove_crypto_service_key(uint32_t session_id, uint32_t key_id, 183 uint32_t *mbox_error); 184 int intel_fcs_get_crypto_service_key_info(uint32_t session_id, uint32_t key_id, 185 uint64_t dst_addr, uint32_t *dst_size, 186 uint32_t *mbox_error); 187 188 int intel_fcs_get_digest_init(uint32_t session_id, uint32_t context_id, 189 uint32_t key_id, uint32_t param_size, 190 uint64_t param_data, uint32_t *mbox_error); 191 int intel_fcs_get_digest_finalize(uint32_t session_id, uint32_t context_id, 192 uint32_t src_addr, uint32_t src_size, 193 uint64_t dst_addr, uint32_t *dst_size, 194 uint32_t *mbox_error); 195 196 int intel_fcs_mac_verify_init(uint32_t session_id, uint32_t context_id, 197 uint32_t key_id, uint32_t param_size, 198 uint64_t param_data, uint32_t *mbox_error); 199 int intel_fcs_mac_verify_finalize(uint32_t session_id, uint32_t context_id, 200 uint32_t src_addr, uint32_t src_size, 201 uint64_t dst_addr, uint32_t *dst_size, 202 uint32_t data_size, uint32_t *mbox_error); 203 204 int intel_fcs_aes_crypt_init(uint32_t session_id, uint32_t context_id, 205 uint32_t key_id, uint64_t param_addr, 206 uint32_t param_size, uint32_t *mbox_error); 207 int intel_fcs_aes_crypt_finalize(uint32_t session_id, uint32_t context_id, 208 uint64_t src_addr, uint32_t src_size, 209 uint64_t dst_addr, uint32_t dst_size, 210 uint32_t *send_id); 211 212 #endif /* SOCFPGA_FCS_H */ 213