1286b96f4SSieu Mun Tang /* 2286b96f4SSieu Mun Tang * Copyright (c) 2020-2022, Intel Corporation. All rights reserved. 3286b96f4SSieu Mun Tang * 4286b96f4SSieu Mun Tang * SPDX-License-Identifier: BSD-3-Clause 5286b96f4SSieu Mun Tang */ 6286b96f4SSieu Mun Tang 7286b96f4SSieu Mun Tang #ifndef SOCFPGA_FCS_H 8286b96f4SSieu Mun Tang #define SOCFPGA_FCS_H 9286b96f4SSieu Mun Tang 10286b96f4SSieu Mun Tang /* FCS Definitions */ 11286b96f4SSieu Mun Tang 12286b96f4SSieu Mun Tang #define FCS_RANDOM_WORD_SIZE 8U 13286b96f4SSieu Mun Tang #define FCS_PROV_DATA_WORD_SIZE 44U 1477902fcaSSieu Mun Tang #define FCS_SHA384_WORD_SIZE 12U 15286b96f4SSieu Mun Tang 16286b96f4SSieu Mun Tang #define FCS_RANDOM_BYTE_SIZE (FCS_RANDOM_WORD_SIZE * 4U) 17286b96f4SSieu Mun Tang #define FCS_PROV_DATA_BYTE_SIZE (FCS_PROV_DATA_WORD_SIZE * 4U) 1877902fcaSSieu Mun Tang #define FCS_SHA384_BYTE_SIZE (FCS_SHA384_WORD_SIZE * 4U) 19286b96f4SSieu Mun Tang 2002d3ef33SSieu Mun Tang #define FCS_MODE_DECRYPT 0x0 2102d3ef33SSieu Mun Tang #define FCS_MODE_ENCRYPT 0x1 2202d3ef33SSieu Mun Tang #define FCS_ENCRYPTION_DATA_0 0x10100 2302d3ef33SSieu Mun Tang #define FCS_DECRYPTION_DATA_0 0x10102 2402d3ef33SSieu Mun Tang #define FCS_OWNER_ID_OFFSET 0xC 25286b96f4SSieu Mun Tang 26d1740831SSieu Mun Tang #define PSGSIGMA_TEARDOWN_MAGIC 0xB852E2A4 27d1740831SSieu Mun Tang #define PSGSIGMA_SESSION_ID_ONE 0x1 28d1740831SSieu Mun Tang #define PSGSIGMA_UNKNOWN_SESSION 0xFFFFFFFF 29d1740831SSieu Mun Tang 30d1740831SSieu Mun Tang #define RESERVED_AS_ZERO 0x0 31*7facacecSSieu Mun Tang /* FCS Single cert */ 32*7facacecSSieu Mun Tang 33*7facacecSSieu Mun Tang #define FCS_BIG_CNTR_SEL 0x1 34*7facacecSSieu Mun Tang 35*7facacecSSieu Mun Tang #define FCS_SVN_CNTR_0_SEL 0x2 36*7facacecSSieu Mun Tang #define FCS_SVN_CNTR_1_SEL 0x3 37*7facacecSSieu Mun Tang #define FCS_SVN_CNTR_2_SEL 0x4 38*7facacecSSieu Mun Tang #define FCS_SVN_CNTR_3_SEL 0x5 39*7facacecSSieu Mun Tang 40*7facacecSSieu Mun Tang #define FCS_BIG_CNTR_VAL_MAX 495U 41*7facacecSSieu Mun Tang #define FCS_SVN_CNTR_VAL_MAX 64U 42d1740831SSieu Mun Tang 43286b96f4SSieu Mun Tang /* FCS Payload Structure */ 44286b96f4SSieu Mun Tang 4502d3ef33SSieu Mun Tang typedef struct fcs_encrypt_payload_t { 46286b96f4SSieu Mun Tang uint32_t first_word; 47286b96f4SSieu Mun Tang uint32_t src_addr; 48286b96f4SSieu Mun Tang uint32_t src_size; 49286b96f4SSieu Mun Tang uint32_t dst_addr; 50286b96f4SSieu Mun Tang uint32_t dst_size; 5102d3ef33SSieu Mun Tang } fcs_encrypt_payload; 5202d3ef33SSieu Mun Tang 5302d3ef33SSieu Mun Tang typedef struct fcs_decrypt_payload_t { 5402d3ef33SSieu Mun Tang uint32_t first_word; 5502d3ef33SSieu Mun Tang uint32_t owner_id[2]; 5602d3ef33SSieu Mun Tang uint32_t src_addr; 5702d3ef33SSieu Mun Tang uint32_t src_size; 5802d3ef33SSieu Mun Tang uint32_t dst_addr; 5902d3ef33SSieu Mun Tang uint32_t dst_size; 6002d3ef33SSieu Mun Tang } fcs_decrypt_payload; 61286b96f4SSieu Mun Tang 62d1740831SSieu Mun Tang typedef struct psgsigma_teardown_msg_t { 63d1740831SSieu Mun Tang uint32_t reserved_word; 64d1740831SSieu Mun Tang uint32_t magic_word; 65d1740831SSieu Mun Tang uint32_t session_id; 66d1740831SSieu Mun Tang } psgsigma_teardown_msg; 67d1740831SSieu Mun Tang 68*7facacecSSieu Mun Tang typedef struct fcs_cntr_set_preauth_payload_t { 69*7facacecSSieu Mun Tang uint32_t first_word; 70*7facacecSSieu Mun Tang uint32_t counter_value; 71*7facacecSSieu Mun Tang } fcs_cntr_set_preauth_payload; 72d1740831SSieu Mun Tang 73286b96f4SSieu Mun Tang /* Functions Definitions */ 74286b96f4SSieu Mun Tang 75286b96f4SSieu Mun Tang uint32_t intel_fcs_random_number_gen(uint64_t addr, uint64_t *ret_size, 76286b96f4SSieu Mun Tang uint32_t *mbox_error); 77286b96f4SSieu Mun Tang uint32_t intel_fcs_send_cert(uint64_t addr, uint64_t size, 78286b96f4SSieu Mun Tang uint32_t *send_id); 79286b96f4SSieu Mun Tang uint32_t intel_fcs_get_provision_data(uint32_t *send_id); 80*7facacecSSieu Mun Tang uint32_t intel_fcs_cntr_set_preauth(uint8_t counter_type, 81*7facacecSSieu Mun Tang int32_t counter_value, 82*7facacecSSieu Mun Tang uint32_t test_bit, 83*7facacecSSieu Mun Tang uint32_t *mbox_error); 8402d3ef33SSieu Mun Tang uint32_t intel_fcs_encryption(uint32_t src_addr, uint32_t src_size, 8502d3ef33SSieu Mun Tang uint32_t dst_addr, uint32_t dst_size, 8602d3ef33SSieu Mun Tang uint32_t *send_id); 8702d3ef33SSieu Mun Tang 8802d3ef33SSieu Mun Tang uint32_t intel_fcs_decryption(uint32_t src_addr, uint32_t src_size, 8902d3ef33SSieu Mun Tang uint32_t dst_addr, uint32_t dst_size, 9002d3ef33SSieu Mun Tang uint32_t *send_id); 91286b96f4SSieu Mun Tang 92d1740831SSieu Mun Tang int intel_fcs_sigma_teardown(uint32_t session_id, uint32_t *mbox_error); 93d1740831SSieu Mun Tang int intel_fcs_chip_id(uint32_t *id_low, uint32_t *id_high, uint32_t *mbox_error); 94d1740831SSieu Mun Tang int intel_fcs_attestation_subkey(uint64_t src_addr, uint32_t src_size, 95d1740831SSieu Mun Tang uint64_t dst_addr, uint32_t *dst_size, 96d1740831SSieu Mun Tang uint32_t *mbox_error); 97d1740831SSieu Mun Tang int intel_fcs_get_measurement(uint64_t src_addr, uint32_t src_size, 98d1740831SSieu Mun Tang uint64_t dst_addr, uint32_t *dst_size, 99d1740831SSieu Mun Tang uint32_t *mbox_error); 10077902fcaSSieu Mun Tang uint32_t intel_fcs_get_rom_patch_sha384(uint64_t addr, uint64_t *ret_size, 10177902fcaSSieu Mun Tang uint32_t *mbox_error); 10277902fcaSSieu Mun Tang 103286b96f4SSieu Mun Tang #endif /* SOCFPGA_FCS_H */ 104